NASM 全部指令「第二部分」
作者：互联网
NASM 全部指令「第二部分」
- 第一部分地址
- B.1.41 AVX-512 instructions
- B.1.42 Intel memory protection keys for userspace (PKU aka PKEYs)
- B.1.43 Read Processor ID
- B.1.44 New memory instructions
- B.1.45 Processor trace write
- B.1.46 Instructions from the Intel Instruction Set Extensions,
- B.1.47 doc 319433-034 May 2018
- B.1.48 Galois field operations (GFNI)
- B.1.49 AVX512 Vector Bit Manipulation Instructions 2
- B.1.50 AVX512 VNNI
- B.1.51 AVX512 Bit Algorithms
- B.1.52 AVX512 4-iteration Multiply-Add
- B.1.53 AVX512 4-iteration Dot Product
- B.1.54 Intel Software Guard Extensions (SGX)
- B.1.55 Intel Control-Flow Enforcement Technology (CET)
- B.1.56 Instructions from ISE doc 319433-040, June 2020
- B.1.57 AVX512 Bfloat16 instructions
- B.1.58 AVX512 mask intersect instructions
- B.1.59 Intel Advanced Matrix Extensions (AMX)
- B.1.60 Systematic names for the hinting nop instructions
第一部分地址
https://blog.csdn.net/qq_17790209/article/details/113790728
B.1.41 AVX-512 instructions
VADDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VADDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VADDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512
VADDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VADDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VADDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512
VADDSD xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512
VADDSS xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512
VALIGND xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL
VALIGND ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL
VALIGND zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512
VALIGNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL
VALIGNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL
VALIGNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512
VANDNPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ
VANDNPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ
VANDNPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ
VANDNPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ
VANDNPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ
VANDNPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ
VANDPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ
VANDPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ
VANDPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ
VANDPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ
VANDPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ
VANDPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ
VBLENDMPD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VBLENDMPD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VBLENDMPD zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512
VBLENDMPS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VBLENDMPS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VBLENDMPS zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512
VBROADCASTF32X2 ymmreg|mask|z,xmmrm64 AVX512VL/DQ
VBROADCASTF32X2 zmmreg|mask|z,xmmrm64 AVX512DQ
VBROADCASTF32X4 ymmreg|mask|z,mem128 AVX512VL
VBROADCASTF32X4 zmmreg|mask|z,mem128 AVX512
VBROADCASTF32X8 zmmreg|mask|z,mem256 AVX512DQ
VBROADCASTF64X2 ymmreg|mask|z,mem128 AVX512VL/DQ
VBROADCASTF64X2 zmmreg|mask|z,mem128 AVX512DQ
VBROADCASTF64X4 zmmreg|mask|z,mem256 AVX512
VBROADCASTI32X2 xmmreg|mask|z,xmmrm64 AVX512VL/DQ
VBROADCASTI32X2 ymmreg|mask|z,xmmrm64 AVX512VL/DQ
VBROADCASTI32X2 zmmreg|mask|z,xmmrm64 AVX512DQ
VBROADCASTI32X4 ymmreg|mask|z,mem128 AVX512VL
VBROADCASTI32X4 zmmreg|mask|z,mem128 AVX512
VBROADCASTI32X8 zmmreg|mask|z,mem256 AVX512DQ
VBROADCASTI64X2 ymmreg|mask|z,mem128 AVX512VL/DQ
VBROADCASTI64X2 zmmreg|mask|z,mem128 AVX512DQ
VBROADCASTI64X4 zmmreg|mask|z,mem256 AVX512
VBROADCASTSD ymmreg|mask|z,mem64 AVX512VL
VBROADCASTSD zmmreg|mask|z,mem64 AVX512
VBROADCASTSD ymmreg|mask|z,xmmreg AVX512VL
VBROADCASTSD zmmreg|mask|z,xmmreg AVX512
VBROADCASTSS xmmreg|mask|z,mem32 AVX512VL
VBROADCASTSS ymmreg|mask|z,mem32 AVX512VL
VBROADCASTSS zmmreg|mask|z,mem32 AVX512
VBROADCASTSS xmmreg|mask|z,xmmreg AVX512VL
VBROADCASTSS ymmreg|mask|z,xmmreg AVX512VL
VBROADCASTSS zmmreg|mask|z,xmmreg AVX512
VCMPEQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPEQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPEQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPEQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPEQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPEQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPEQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPEQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPEQ_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPEQ_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPEQ_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPEQ_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPEQ_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPEQ_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPEQ_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPEQ_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPLTPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPLTPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPLTPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPLTPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPLTPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPLTPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPLTSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPLTSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPLT_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPLT_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPLT_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPLT_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPLT_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPLT_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPLT_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPLT_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPLEPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPLEPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPLEPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPLEPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPLEPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPLEPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPLESD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPLESS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPLE_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPLE_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPLE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPLE_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPLE_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPLE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPLE_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPLE_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPUNORDPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPUNORDPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPUNORDPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPUNORDPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPUNORDPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPUNORDPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPUNORDSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPUNORDSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPUNORD_QPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPUNORD_QPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPUNORD_QPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPUNORD_QPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPUNORD_QPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPUNORD_QPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPUNORD_QSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPUNORD_QSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNEQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNEQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNEQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNEQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNEQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNEQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNEQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNEQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNEQ_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNEQ_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNEQ_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNEQ_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNEQ_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNEQ_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNEQ_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNEQ_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNLTPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNLTPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNLTPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNLTPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNLTPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNLTPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNLTSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNLTSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNLT_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNLT_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNLT_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNLT_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNLT_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNLT_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNLT_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNLT_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNLEPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNLEPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNLEPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNLEPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNLEPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNLEPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNLESD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNLESS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNLE_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNLE_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNLE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNLE_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNLE_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNLE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNLE_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNLE_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPORDPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPORDPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPORDPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPORDPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPORDPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPORDPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPORDSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPORDSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPORD_QPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPORD_QPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPORD_QPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPORD_QPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPORD_QPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPORD_QPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPORD_QSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPORD_QSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPEQ_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPEQ_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPEQ_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPEQ_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPEQ_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPEQ_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPEQ_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPEQ_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNGEPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNGEPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNGEPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNGEPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNGEPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNGEPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNGESD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNGESS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNGE_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNGE_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNGE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNGE_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNGE_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNGE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNGE_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNGE_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNGTPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNGTPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNGTPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNGTPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNGTPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNGTPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNGTSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNGTSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNGT_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNGT_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNGT_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNGT_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNGT_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNGT_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNGT_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNGT_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPFALSEPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPFALSEPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPFALSEPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPFALSEPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPFALSEPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPFALSEPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPFALSESD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPFALSESS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPFALSE_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPFALSE_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPFALSE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPFALSE_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPFALSE_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPFALSE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPFALSE_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPFALSE_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNEQ_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNEQ_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNEQ_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNEQ_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNEQ_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNEQ_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNEQ_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNEQ_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPGEPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPGEPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPGEPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPGEPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPGEPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPGEPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPGESD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPGESS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPGE_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPGE_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPGE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPGE_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPGE_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPGE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPGE_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPGE_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPGTPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPGTPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPGTPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPGTPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPGTPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPGTPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPGTSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPGTSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPGT_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPGT_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPGT_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPGT_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPGT_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPGT_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPGT_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPGT_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPTRUEPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPTRUEPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPTRUEPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPTRUEPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPTRUEPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPTRUEPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPTRUESD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPTRUESS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPTRUE_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPTRUE_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPTRUE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPTRUE_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPTRUE_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPTRUE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPTRUE_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPTRUE_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPEQ_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPEQ_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPEQ_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPEQ_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPEQ_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPEQ_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPEQ_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPEQ_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPLT_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPLT_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPLT_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPLT_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPLT_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPLT_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPLT_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPLT_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPLE_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPLE_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPLE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPLE_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPLE_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPLE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPLE_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPLE_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPUNORD_SPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPUNORD_SPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPUNORD_SPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPUNORD_SPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPUNORD_SPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPUNORD_SPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPUNORD_SSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPUNORD_SSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNEQ_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNEQ_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNEQ_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNEQ_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNEQ_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNEQ_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNEQ_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNEQ_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNLT_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNLT_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNLT_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNLT_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNLT_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNLT_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNLT_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNLT_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNLE_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNLE_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNLE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNLE_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNLE_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNLE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNLE_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNLE_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPORD_SPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPORD_SPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPORD_SPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPORD_SPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPORD_SPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPORD_SPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPORD_SSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPORD_SSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPEQ_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPEQ_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPEQ_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPEQ_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPEQ_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPEQ_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPEQ_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPEQ_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNGE_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNGE_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNGE_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNGE_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNGE_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNGE_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNGE_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNGE_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNGT_UQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNGT_UQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNGT_UQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNGT_UQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNGT_UQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNGT_UQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNGT_UQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNGT_UQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPFALSE_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPFALSE_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPFALSE_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPFALSE_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPFALSE_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPFALSE_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPFALSE_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPFALSE_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPNEQ_OSPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPNEQ_OSPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPNEQ_OSPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPNEQ_OSPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPNEQ_OSPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPNEQ_OSPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPNEQ_OSSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPNEQ_OSSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPGE_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPGE_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPGE_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPGE_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPGE_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPGE_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPGE_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPGE_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPGT_OQPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPGT_OQPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPGT_OQPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPGT_OQPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPGT_OQPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPGT_OQPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPGT_OQSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPGT_OQSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPTRUE_USPD kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VCMPTRUE_USPD kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VCMPTRUE_USPD kreg|mask,zmmreg,zmmrm512|b64|sae AVX512
VCMPTRUE_USPS kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VCMPTRUE_USPS kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VCMPTRUE_USPS kreg|mask,zmmreg,zmmrm512|b32|sae AVX512
VCMPTRUE_USSD kreg|mask,xmmreg,xmmrm64|sae AVX512
VCMPTRUE_USSS kreg|mask,xmmreg,xmmrm32|sae AVX512
VCMPPD kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL
VCMPPD kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL
VCMPPD kreg|mask,zmmreg,zmmrm512|b64|sae,imm8 AVX512
VCMPPS kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL
VCMPPS kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL
VCMPPS kreg|mask,zmmreg,zmmrm512|b32|sae,imm8 AVX512
VCMPSD kreg|mask,xmmreg,xmmrm64|sae,imm8 AVX512
VCMPSS kreg|mask,xmmreg,xmmrm32|sae,imm8 AVX512
VCOMISD xmmreg,xmmrm64|sae AVX512
VCOMISS xmmreg,xmmrm32|sae AVX512
VCOMPRESSPD mem128|mask,xmmreg AVX512VL
VCOMPRESSPD mem256|mask,ymmreg AVX512VL
VCOMPRESSPD mem512|mask,zmmreg AVX512
VCOMPRESSPD xmmreg|mask|z,xmmreg AVX512VL
VCOMPRESSPD ymmreg|mask|z,ymmreg AVX512VL
VCOMPRESSPD zmmreg|mask|z,zmmreg AVX512
VCOMPRESSPS mem128|mask,xmmreg AVX512VL
VCOMPRESSPS mem256|mask,ymmreg AVX512VL
VCOMPRESSPS mem512|mask,zmmreg AVX512
VCOMPRESSPS xmmreg|mask|z,xmmreg AVX512VL
VCOMPRESSPS ymmreg|mask|z,ymmreg AVX512VL
VCOMPRESSPS zmmreg|mask|z,zmmreg AVX512
VCVTDQ2PD xmmreg|mask|z,xmmrm64|b32 AVX512VL
VCVTDQ2PD ymmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTDQ2PD zmmreg|mask|z,ymmrm256|b32|er AVX512
VCVTDQ2PS xmmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTDQ2PS ymmreg|mask|z,ymmrm256|b32 AVX512VL
VCVTDQ2PS zmmreg|mask|z,zmmrm512|b32|er AVX512
VCVTPD2DQ xmmreg|mask|z,xmmrm128|b64 AVX512VL
VCVTPD2DQ xmmreg|mask|z,ymmrm256|b64 AVX512VL
VCVTPD2DQ ymmreg|mask|z,zmmrm512|b64|er AVX512
VCVTPD2PS xmmreg|mask|z,xmmrm128|b64 AVX512VL
VCVTPD2PS xmmreg|mask|z,ymmrm256|b64 AVX512VL
VCVTPD2PS ymmreg|mask|z,zmmrm512|b64|er AVX512
VCVTPD2QQ xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTPD2QQ ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTPD2QQ zmmreg|mask|z,zmmrm512|b64|er AVX512DQ
VCVTPD2UDQ xmmreg|mask|z,xmmrm128|b64 AVX512VL
VCVTPD2UDQ xmmreg|mask|z,ymmrm256|b64 AVX512VL
VCVTPD2UDQ ymmreg|mask|z,zmmrm512|b64|er AVX512
VCVTPD2UQQ xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTPD2UQQ ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTPD2UQQ zmmreg|mask|z,zmmrm512|b64|er AVX512DQ
VCVTPH2PS xmmreg|mask|z,xmmrm64 AVX512VL
VCVTPH2PS ymmreg|mask|z,xmmrm128 AVX512VL
VCVTPH2PS zmmreg|mask|z,ymmrm256|sae AVX512
VCVTPS2DQ xmmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTPS2DQ ymmreg|mask|z,ymmrm256|b32 AVX512VL
VCVTPS2DQ zmmreg|mask|z,zmmrm512|b32|er AVX512
VCVTPS2PD xmmreg|mask|z,xmmrm64|b32 AVX512VL
VCVTPS2PD ymmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTPS2PD zmmreg|mask|z,ymmrm256|b32|sae AVX512
VCVTPS2PH xmmreg|mask|z,xmmreg,imm8 AVX512VL
VCVTPS2PH xmmreg|mask|z,ymmreg,imm8 AVX512VL
VCVTPS2PH ymmreg|mask|z,zmmreg|sae,imm8 AVX512
VCVTPS2PH mem64|mask,xmmreg,imm8 AVX512VL
VCVTPS2PH mem128|mask,ymmreg,imm8 AVX512VL
VCVTPS2PH mem256|mask,zmmreg|sae,imm8 AVX512
VCVTPS2QQ xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ
VCVTPS2QQ ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ
VCVTPS2QQ zmmreg|mask|z,ymmrm256|b32|er AVX512DQ
VCVTPS2UDQ xmmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTPS2UDQ ymmreg|mask|z,ymmrm256|b32 AVX512VL
VCVTPS2UDQ zmmreg|mask|z,zmmrm512|b32|er AVX512
VCVTPS2UQQ xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ
VCVTPS2UQQ ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ
VCVTPS2UQQ zmmreg|mask|z,ymmrm256|b32|er AVX512DQ
VCVTQQ2PD xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTQQ2PD ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTQQ2PD zmmreg|mask|z,zmmrm512|b64|er AVX512DQ
VCVTQQ2PS xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTQQ2PS xmmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTQQ2PS ymmreg|mask|z,zmmrm512|b64|er AVX512DQ
VCVTSD2SI reg32,xmmrm64|er AVX512
VCVTSD2SI reg64,xmmrm64|er AVX512
VCVTSD2SS xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VCVTSD2USI reg32,xmmrm64|er AVX512
VCVTSD2USI reg64,xmmrm64|er AVX512
VCVTSI2SD xmmreg,xmmreg|er,rm32 AVX512
VCVTSI2SD xmmreg,xmmreg|er,rm64 AVX512
VCVTSI2SS xmmreg,xmmreg|er,rm32 AVX512
VCVTSI2SS xmmreg,xmmreg|er,rm64 AVX512
VCVTSS2SD xmmreg|mask|z,xmmreg,xmmrm32|sae AVX512
VCVTSS2SI reg32,xmmrm32|er AVX512
VCVTSS2SI reg64,xmmrm32|er AVX512
VCVTSS2USI reg32,xmmrm32|er AVX512
VCVTSS2USI reg64,xmmrm32|er AVX512
VCVTTPD2DQ xmmreg|mask|z,xmmrm128|b64 AVX512VL
VCVTTPD2DQ xmmreg|mask|z,ymmrm256|b64 AVX512VL
VCVTTPD2DQ ymmreg|mask|z,zmmrm512|b64|sae AVX512
VCVTTPD2QQ xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTTPD2QQ ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTTPD2QQ zmmreg|mask|z,zmmrm512|b64|sae AVX512DQ
VCVTTPD2UDQ xmmreg|mask|z,xmmrm128|b64 AVX512VL
VCVTTPD2UDQ xmmreg|mask|z,ymmrm256|b64 AVX512VL
VCVTTPD2UDQ ymmreg|mask|z,zmmrm512|b64|sae AVX512
VCVTTPD2UQQ xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTTPD2UQQ ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTTPD2UQQ zmmreg|mask|z,zmmrm512|b64|sae AVX512DQ
VCVTTPS2DQ xmmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTTPS2DQ ymmreg|mask|z,ymmrm256|b32 AVX512VL
VCVTTPS2DQ zmmreg|mask|z,zmmrm512|b32|sae AVX512
VCVTTPS2QQ xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ
VCVTTPS2QQ ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ
VCVTTPS2QQ zmmreg|mask|z,ymmrm256|b32|sae AVX512DQ
VCVTTPS2UDQ xmmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTTPS2UDQ ymmreg|mask|z,ymmrm256|b32 AVX512VL
VCVTTPS2UDQ zmmreg|mask|z,zmmrm512|b32|sae AVX512
VCVTTPS2UQQ xmmreg|mask|z,xmmrm64|b32 AVX512VL/DQ
VCVTTPS2UQQ ymmreg|mask|z,xmmrm128|b32 AVX512VL/DQ
VCVTTPS2UQQ zmmreg|mask|z,ymmrm256|b32|sae AVX512DQ
VCVTTSD2SI reg32,xmmrm64|sae AVX512
VCVTTSD2SI reg64,xmmrm64|sae AVX512
VCVTTSD2USI reg32,xmmrm64|sae AVX512
VCVTTSD2USI reg64,xmmrm64|sae AVX512
VCVTTSS2SI reg32,xmmrm32|sae AVX512
VCVTTSS2SI reg64,xmmrm32|sae AVX512
VCVTTSS2USI reg32,xmmrm32|sae AVX512
VCVTTSS2USI reg64,xmmrm32|sae AVX512
VCVTUDQ2PD xmmreg|mask|z,xmmrm64|b32 AVX512VL
VCVTUDQ2PD ymmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTUDQ2PD zmmreg|mask|z,ymmrm256|b32|er AVX512
VCVTUDQ2PS xmmreg|mask|z,xmmrm128|b32 AVX512VL
VCVTUDQ2PS ymmreg|mask|z,ymmrm256|b32 AVX512VL
VCVTUDQ2PS zmmreg|mask|z,zmmrm512|b32|er AVX512
VCVTUQQ2PD xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTUQQ2PD ymmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTUQQ2PD zmmreg|mask|z,zmmrm512|b64|er AVX512DQ
VCVTUQQ2PS xmmreg|mask|z,xmmrm128|b64 AVX512VL/DQ
VCVTUQQ2PS xmmreg|mask|z,ymmrm256|b64 AVX512VL/DQ
VCVTUQQ2PS ymmreg|mask|z,zmmrm512|b64|er AVX512DQ
VCVTUSI2SD xmmreg,xmmreg|er,rm32 AVX512
VCVTUSI2SD xmmreg,xmmreg|er,rm64 AVX512
VCVTUSI2SS xmmreg,xmmreg|er,rm32 AVX512
VCVTUSI2SS xmmreg,xmmreg|er,rm64 AVX512
VDBPSADBW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VL/BW
VDBPSADBW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VL/BW
VDBPSADBW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512BW
VDIVPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VDIVPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VDIVPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512
VDIVPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VDIVPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VDIVPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512
VDIVSD xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512
VDIVSS xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512
VEXP2PD zmmreg|mask|z,zmmrm512|b64|sae AVX512ER
VEXP2PS zmmreg|mask|z,zmmrm512|b32|sae AVX512ER
VEXPANDPD xmmreg|mask|z,mem128 AVX512VL
VEXPANDPD ymmreg|mask|z,mem256 AVX512VL
VEXPANDPD zmmreg|mask|z,mem512 AVX512
VEXPANDPD xmmreg|mask|z,xmmreg AVX512VL
VEXPANDPD ymmreg|mask|z,ymmreg AVX512VL
VEXPANDPD zmmreg|mask|z,zmmreg AVX512
VEXPANDPS xmmreg|mask|z,mem128 AVX512VL
VEXPANDPS ymmreg|mask|z,mem256 AVX512VL
VEXPANDPS zmmreg|mask|z,mem512 AVX512
VEXPANDPS xmmreg|mask|z,xmmreg AVX512VL
VEXPANDPS ymmreg|mask|z,ymmreg AVX512VL
VEXPANDPS zmmreg|mask|z,zmmreg AVX512
VEXTRACTF32X4 xmmreg|mask|z,ymmreg,imm8 AVX512VL
VEXTRACTF32X4 xmmreg|mask|z,zmmreg,imm8 AVX512
VEXTRACTF32X4 mem128|mask,ymmreg,imm8 AVX512VL
VEXTRACTF32X4 mem128|mask,zmmreg,imm8 AVX512
VEXTRACTF32X8 ymmreg|mask|z,zmmreg,imm8 AVX512DQ
VEXTRACTF32X8 mem256|mask,zmmreg,imm8 AVX512DQ
VEXTRACTF64X2 xmmreg|mask|z,ymmreg,imm8 AVX512VL/DQ
VEXTRACTF64X2 xmmreg|mask|z,zmmreg,imm8 AVX512DQ
VEXTRACTF64X2 mem128|mask,ymmreg,imm8 AVX512VL/DQ
VEXTRACTF64X2 mem128|mask,zmmreg,imm8 AVX512DQ
VEXTRACTF64X4 ymmreg|mask|z,zmmreg,imm8 AVX512
VEXTRACTF64X4 mem256|mask,zmmreg,imm8 AVX512
VEXTRACTI32X4 xmmreg|mask|z,ymmreg,imm8 AVX512VL
VEXTRACTI32X4 xmmreg|mask|z,zmmreg,imm8 AVX512
VEXTRACTI32X4 mem128|mask,ymmreg,imm8 AVX512VL
VEXTRACTI32X4 mem128|mask,zmmreg,imm8 AVX512
VEXTRACTI32X8 ymmreg|mask|z,zmmreg,imm8 AVX512DQ
VEXTRACTI32X8 mem256|mask,zmmreg,imm8 AVX512DQ
VEXTRACTI64X2 xmmreg|mask|z,ymmreg,imm8 AVX512VL/DQ
VEXTRACTI64X2 xmmreg|mask|z,zmmreg,imm8 AVX512DQ
VEXTRACTI64X2 mem128|mask,ymmreg,imm8 AVX512VL/DQ
VEXTRACTI64X2 mem128|mask,zmmreg,imm8 AVX512DQ
VEXTRACTI64X4 ymmreg|mask|z,zmmreg,imm8 AVX512
VEXTRACTI64X4 mem256|mask,zmmreg,imm8 AVX512
VEXTRACTPS reg32,xmmreg,imm8 AVX512
VEXTRACTPS reg64,xmmreg,imm8 AVX512
VEXTRACTPS mem32,xmmreg,imm8 AVX512
VFIXUPIMMPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL
VFIXUPIMMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL
VFIXUPIMMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 AVX512
VFIXUPIMMPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL
VFIXUPIMMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL
VFIXUPIMMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 AVX512
VFIXUPIMMSD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512
VFIXUPIMMSS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512
VFMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFMADDSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMADDSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMADDSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMADDSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMADDSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMADDSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMADDSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMADDSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMADDSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMADDSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMADDSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMADDSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMADDSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMADDSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMADDSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMADDSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMADDSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMADDSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFMSUBADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMSUBADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMSUBADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMSUBADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMSUBADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMSUBADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMSUBADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMSUBADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMSUBADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMSUBADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMSUBADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMSUBADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFMSUBADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFMSUBADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFMSUBADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFMSUBADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFMSUBADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFMSUBADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMADD132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFNMADD132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFNMADD132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFNMADD132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFNMADD132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFNMADD132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMADD132SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFNMADD132SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFNMADD213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFNMADD213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFNMADD213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFNMADD213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFNMADD213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFNMADD213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMADD213SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFNMADD213SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFNMADD231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFNMADD231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFNMADD231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFNMADD231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFNMADD231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFNMADD231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMADD231SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFNMADD231SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFNMSUB132PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFNMSUB132PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFNMSUB132PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFNMSUB132PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFNMSUB132PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFNMSUB132PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMSUB132SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFNMSUB132SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFNMSUB213PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFNMSUB213PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFNMSUB213PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFNMSUB213PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFNMSUB213PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFNMSUB213PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMSUB213SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFNMSUB213SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFNMSUB231PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VFNMSUB231PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VFNMSUB231PD zmmreg|mask|z,zmmreg,zmmrm512|b64|er AVX512
VFNMSUB231PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VFNMSUB231PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VFNMSUB231PS zmmreg|mask|z,zmmreg,zmmrm512|b32|er AVX512
VFNMSUB231SD xmmreg|mask|z,xmmreg,xmmrm64|er AVX512
VFNMSUB231SS xmmreg|mask|z,xmmreg,xmmrm32|er AVX512
VFPCLASSPD kreg|mask,xmmrm128|b64,imm8 AVX512VL/DQ
VFPCLASSPD kreg|mask,ymmrm256|b64,imm8 AVX512VL/DQ
VFPCLASSPD kreg|mask,zmmrm512|b64,imm8 AVX512DQ
VFPCLASSPS kreg|mask,xmmrm128|b32,imm8 AVX512VL/DQ
VFPCLASSPS kreg|mask,ymmrm256|b32,imm8 AVX512VL/DQ
VFPCLASSPS kreg|mask,zmmrm512|b32,imm8 AVX512DQ
VFPCLASSSD kreg|mask,xmmrm64,imm8 AVX512DQ
VFPCLASSSS kreg|mask,xmmrm32,imm8 AVX512DQ
VGATHERDPD xmmreg|mask,xmem64 AVX512VL
VGATHERDPD ymmreg|mask,xmem64 AVX512VL
VGATHERDPD zmmreg|mask,ymem64 AVX512
VGATHERDPS xmmreg|mask,xmem32 AVX512VL
VGATHERDPS ymmreg|mask,ymem32 AVX512VL
VGATHERDPS zmmreg|mask,zmem32 AVX512
VGATHERPF0DPD ymem64|mask AVX512PF
VGATHERPF0DPS zmem32|mask AVX512PF
VGATHERPF0QPD zmem64|mask AVX512PF
VGATHERPF0QPS zmem32|mask AVX512PF
VGATHERPF1DPD ymem64|mask AVX512PF
VGATHERPF1DPS zmem32|mask AVX512PF
VGATHERPF1QPD zmem64|mask AVX512PF
VGATHERPF1QPS zmem32|mask AVX512PF
VGATHERQPD xmmreg|mask,xmem64 AVX512VL
VGATHERQPD ymmreg|mask,ymem64 AVX512VL
VGATHERQPD zmmreg|mask,zmem64 AVX512
VGATHERQPS xmmreg|mask,xmem32 AVX512VL
VGATHERQPS xmmreg|mask,ymem32 AVX512VL
VGATHERQPS ymmreg|mask,zmem32 AVX512
VGETEXPPD xmmreg|mask|z,xmmrm128|b64 AVX512VL
VGETEXPPD ymmreg|mask|z,ymmrm256|b64 AVX512VL
VGETEXPPD zmmreg|mask|z,zmmrm512|b64|sae AVX512
VGETEXPPS xmmreg|mask|z,xmmrm128|b32 AVX512VL
VGETEXPPS ymmreg|mask|z,ymmrm256|b32 AVX512VL
VGETEXPPS zmmreg|mask|z,zmmrm512|b32|sae AVX512
VGETEXPSD xmmreg|mask|z,xmmreg,xmmrm64|sae AVX512
VGETEXPSS xmmreg|mask|z,xmmreg,xmmrm32|sae AVX512
VGETMANTPD xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL
VGETMANTPD ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL
VGETMANTPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512
VGETMANTPS xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL
VGETMANTPS ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL
VGETMANTPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512
VGETMANTSD xmmreg|mask|z,xmmreg,xmmrm64|sae,imm8 AVX512
VGETMANTSS xmmreg|mask|z,xmmreg,xmmrm32|sae,imm8 AVX512
VINSERTF32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL
VINSERTF32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512
VINSERTF32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512DQ
VINSERTF64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL/DQ
VINSERTF64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512DQ
VINSERTF64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512
VINSERTI32X4 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL
VINSERTI32X4 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512
VINSERTI32X8 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512DQ
VINSERTI64X2 ymmreg|mask|z,ymmreg*,xmmrm128,imm8 AVX512VL/DQ
VINSERTI64X2 zmmreg|mask|z,zmmreg*,xmmrm128,imm8 AVX512DQ
VINSERTI64X4 zmmreg|mask|z,zmmreg*,ymmrm256,imm8 AVX512
VINSERTPS xmmreg,xmmreg*,xmmrm32,imm8 AVX512
VMAXPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VMAXPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VMAXPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae AVX512
VMAXPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VMAXPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VMAXPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae AVX512
VMAXSD xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512
VMAXSS xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512
VMINPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VMINPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VMINPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae AVX512
VMINPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VMINPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VMINPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae AVX512
VMINSD xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512
VMINSS xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512
VMOVAPD xmmreg|mask|z,xmmrm128 AVX512VL
VMOVAPD ymmreg|mask|z,ymmrm256 AVX512VL
VMOVAPD zmmreg|mask|z,zmmrm512 AVX512
VMOVAPD xmmreg|mask|z,xmmreg AVX512VL
VMOVAPD ymmreg|mask|z,ymmreg AVX512VL
VMOVAPD zmmreg|mask|z,zmmreg AVX512
VMOVAPD mem128|mask,xmmreg AVX512VL
VMOVAPD mem256|mask,ymmreg AVX512VL
VMOVAPD mem512|mask,zmmreg AVX512
VMOVAPS xmmreg|mask|z,xmmrm128 AVX512VL
VMOVAPS ymmreg|mask|z,ymmrm256 AVX512VL
VMOVAPS zmmreg|mask|z,zmmrm512 AVX512
VMOVAPS xmmreg|mask|z,xmmreg AVX512VL
VMOVAPS ymmreg|mask|z,ymmreg AVX512VL
VMOVAPS zmmreg|mask|z,zmmreg AVX512
VMOVAPS mem128|mask,xmmreg AVX512VL
VMOVAPS mem256|mask,ymmreg AVX512VL
VMOVAPS mem512|mask,zmmreg AVX512
VMOVD xmmreg,rm32 AVX512
VMOVD rm32,xmmreg AVX512
VMOVDDUP xmmreg|mask|z,xmmrm64 AVX512VL
VMOVDDUP ymmreg|mask|z,ymmrm256 AVX512VL
VMOVDDUP zmmreg|mask|z,zmmrm512 AVX512
VMOVDQA32 xmmreg|mask|z,xmmrm128 AVX512VL
VMOVDQA32 ymmreg|mask|z,ymmrm256 AVX512VL
VMOVDQA32 zmmreg|mask|z,zmmrm512 AVX512
VMOVDQA32 xmmrm128|mask|z,xmmreg AVX512VL
VMOVDQA32 ymmrm256|mask|z,ymmreg AVX512VL
VMOVDQA32 zmmrm512|mask|z,zmmreg AVX512
VMOVDQA64 xmmreg|mask|z,xmmrm128 AVX512VL
VMOVDQA64 ymmreg|mask|z,ymmrm256 AVX512VL
VMOVDQA64 zmmreg|mask|z,zmmrm512 AVX512
VMOVDQA64 xmmrm128|mask|z,xmmreg AVX512VL
VMOVDQA64 ymmrm256|mask|z,ymmreg AVX512VL
VMOVDQA64 zmmrm512|mask|z,zmmreg AVX512
VMOVDQU16 xmmreg|mask|z,xmmrm128 AVX512VL/BW
VMOVDQU16 ymmreg|mask|z,ymmrm256 AVX512VL/BW
VMOVDQU16 zmmreg|mask|z,zmmrm512 AVX512BW
VMOVDQU16 xmmrm128|mask|z,xmmreg AVX512VL/BW
VMOVDQU16 ymmrm256|mask|z,ymmreg AVX512VL/BW
VMOVDQU16 zmmrm512|mask|z,zmmreg AVX512BW
VMOVDQU32 xmmreg|mask|z,xmmrm128 AVX512VL
VMOVDQU32 ymmreg|mask|z,ymmrm256 AVX512VL
VMOVDQU32 zmmreg|mask|z,zmmrm512 AVX512
VMOVDQU32 xmmrm128|mask|z,xmmreg AVX512VL
VMOVDQU32 ymmrm256|mask|z,ymmreg AVX512VL
VMOVDQU32 zmmrm512|mask|z,zmmreg AVX512
VMOVDQU64 xmmreg|mask|z,xmmrm128 AVX512VL
VMOVDQU64 ymmreg|mask|z,ymmrm256 AVX512VL
VMOVDQU64 zmmreg|mask|z,zmmrm512 AVX512
VMOVDQU64 xmmrm128|mask|z,xmmreg AVX512VL
VMOVDQU64 ymmrm256|mask|z,ymmreg AVX512VL
VMOVDQU64 zmmrm512|mask|z,zmmreg AVX512
VMOVDQU8 xmmreg|mask|z,xmmrm128 AVX512VL/BW
VMOVDQU8 ymmreg|mask|z,ymmrm256 AVX512VL/BW
VMOVDQU8 zmmreg|mask|z,zmmrm512 AVX512BW
VMOVDQU8 xmmrm128|mask|z,xmmreg AVX512VL/BW
VMOVDQU8 ymmrm256|mask|z,ymmreg AVX512VL/BW
VMOVDQU8 zmmrm512|mask|z,zmmreg AVX512BW
VMOVHLPS xmmreg,xmmreg*,xmmreg AVX512
VMOVHPD xmmreg,xmmreg*,mem64 AVX512
VMOVHPD mem64,xmmreg AVX512
VMOVHPS xmmreg,xmmreg*,mem64 AVX512
VMOVHPS mem64,xmmreg AVX512
VMOVLHPS xmmreg,xmmreg*,xmmreg AVX512
VMOVLPD xmmreg,xmmreg*,mem64 AVX512
VMOVLPD mem64,xmmreg AVX512
VMOVLPS xmmreg,xmmreg*,mem64 AVX512
VMOVLPS mem64,xmmreg AVX512
VMOVNTDQ mem128,xmmreg AVX512VL
VMOVNTDQ mem256,ymmreg AVX512VL
VMOVNTDQ mem512,zmmreg AVX512
VMOVNTDQA xmmreg,mem128 AVX512VL
VMOVNTDQA ymmreg,mem256 AVX512VL
VMOVNTDQA zmmreg,mem512 AVX512
VMOVNTPD mem128,xmmreg AVX512VL
VMOVNTPD mem256,ymmreg AVX512VL
VMOVNTPD mem512,zmmreg AVX512
VMOVNTPS mem128,xmmreg AVX512VL
VMOVNTPS mem256,ymmreg AVX512VL
VMOVNTPS mem512,zmmreg AVX512
VMOVQ xmmreg,rm64 AVX512
VMOVQ rm64,xmmreg AVX512
VMOVQ xmmreg,xmmrm64 AVX512
VMOVQ xmmrm64,xmmreg AVX512
VMOVSD xmmreg|mask|z,mem64 AVX512
VMOVSD mem64|mask,xmmreg AVX512
VMOVSD xmmreg|mask|z,xmmreg*,xmmreg AVX512
VMOVSD xmmreg|mask|z,xmmreg*,xmmreg AVX512
VMOVSHDUP xmmreg|mask|z,xmmrm128 AVX512VL
VMOVSHDUP ymmreg|mask|z,ymmrm256 AVX512VL
VMOVSHDUP zmmreg|mask|z,zmmrm512 AVX512
VMOVSLDUP xmmreg|mask|z,xmmrm128 AVX512VL
VMOVSLDUP ymmreg|mask|z,ymmrm256 AVX512VL
VMOVSLDUP zmmreg|mask|z,zmmrm512 AVX512
VMOVSS xmmreg|mask|z,mem32 AVX512
VMOVSS mem32|mask,xmmreg AVX512
VMOVSS xmmreg|mask|z,xmmreg*,xmmreg AVX512
VMOVSS xmmreg|mask|z,xmmreg*,xmmreg AVX512
VMOVUPD xmmreg|mask|z,xmmrm128 AVX512VL
VMOVUPD ymmreg|mask|z,ymmrm256 AVX512VL
VMOVUPD zmmreg|mask|z,zmmrm512 AVX512
VMOVUPD xmmreg|mask|z,xmmreg AVX512VL
VMOVUPD ymmreg|mask|z,ymmreg AVX512VL
VMOVUPD zmmreg|mask|z,zmmreg AVX512
VMOVUPD mem128|mask,xmmreg AVX512VL
VMOVUPD mem256|mask,ymmreg AVX512VL
VMOVUPD mem512|mask,zmmreg AVX512
VMOVUPS xmmreg|mask|z,xmmrm128 AVX512VL
VMOVUPS ymmreg|mask|z,ymmrm256 AVX512VL
VMOVUPS zmmreg|mask|z,zmmrm512 AVX512
VMOVUPS xmmreg|mask|z,xmmreg AVX512VL
VMOVUPS ymmreg|mask|z,ymmreg AVX512VL
VMOVUPS zmmreg|mask|z,zmmreg AVX512
VMOVUPS mem128|mask,xmmreg AVX512VL
VMOVUPS mem256|mask,ymmreg AVX512VL
VMOVUPS mem512|mask,zmmreg AVX512
VMULPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VMULPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VMULPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512
VMULPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VMULPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VMULPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512
VMULSD xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512
VMULSS xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512
VORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ
VORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ
VORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ
VORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ
VORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ
VORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ
VPABSB xmmreg|mask|z,xmmrm128 AVX512VL/BW
VPABSB ymmreg|mask|z,ymmrm256 AVX512VL/BW
VPABSB zmmreg|mask|z,zmmrm512 AVX512BW
VPABSD xmmreg|mask|z,xmmrm128|b32 AVX512VL
VPABSD ymmreg|mask|z,ymmrm256|b32 AVX512VL
VPABSD zmmreg|mask|z,zmmrm512|b32 AVX512
VPABSQ xmmreg|mask|z,xmmrm128|b64 AVX512VL
VPABSQ ymmreg|mask|z,ymmrm256|b64 AVX512VL
VPABSQ zmmreg|mask|z,zmmrm512|b64 AVX512
VPABSW xmmreg|mask|z,xmmrm128 AVX512VL/BW
VPABSW ymmreg|mask|z,ymmrm256 AVX512VL/BW
VPABSW zmmreg|mask|z,zmmrm512 AVX512BW
VPACKSSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/BW
VPACKSSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/BW
VPACKSSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BW
VPACKSSWB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPACKSSWB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPACKSSWB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPACKUSDW xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/BW
VPACKUSDW ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/BW
VPACKUSDW zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BW
VPACKUSWB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPACKUSWB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPACKUSWB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPADDB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPADDB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPADDB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPADDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPADDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPADDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPADDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPADDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPADDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPADDSB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPADDSB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPADDSB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPADDSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPADDSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPADDSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPADDUSB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPADDUSB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPADDUSB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPADDUSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPADDUSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPADDUSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPADDW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPADDW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPADDW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPALIGNR xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VL/BW
VPALIGNR ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VL/BW
VPALIGNR zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512BW
VPANDD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPANDD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPANDD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPANDND xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPANDND ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPANDND zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPANDNQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPANDNQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPANDNQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPANDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPANDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPANDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPAVGB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPAVGB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPAVGB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPAVGW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPAVGW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPAVGW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPBLENDMB xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW
VPBLENDMB ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW
VPBLENDMB zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW
VPBLENDMD xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VPBLENDMD ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VPBLENDMD zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512
VPBLENDMQ xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VPBLENDMQ ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VPBLENDMQ zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512
VPBLENDMW xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW
VPBLENDMW ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW
VPBLENDMW zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW
VPBROADCASTB xmmreg|mask|z,xmmrm8 AVX512VL/BW
VPBROADCASTB ymmreg|mask|z,xmmrm8 AVX512VL/BW
VPBROADCASTB zmmreg|mask|z,xmmrm8 AVX512BW
VPBROADCASTB xmmreg|mask|z,reg8 AVX512VL/BW
VPBROADCASTB xmmreg|mask|z,reg16 AVX512VL/BW
VPBROADCASTB xmmreg|mask|z,reg32 AVX512VL/BW
VPBROADCASTB xmmreg|mask|z,reg64 AVX512VL/BW
VPBROADCASTB ymmreg|mask|z,reg8 AVX512VL/BW
VPBROADCASTB ymmreg|mask|z,reg16 AVX512VL/BW
VPBROADCASTB ymmreg|mask|z,reg32 AVX512VL/BW
VPBROADCASTB ymmreg|mask|z,reg64 AVX512VL/BW
VPBROADCASTB zmmreg|mask|z,reg8 AVX512BW
VPBROADCASTB zmmreg|mask|z,reg16 AVX512BW
VPBROADCASTB zmmreg|mask|z,reg32 AVX512BW
VPBROADCASTB zmmreg|mask|z,reg64 AVX512BW
VPBROADCASTD xmmreg|mask|z,mem32 AVX512VL
VPBROADCASTD ymmreg|mask|z,mem32 AVX512VL
VPBROADCASTD zmmreg|mask|z,mem32 AVX512
VPBROADCASTD xmmreg|mask|z,xmmreg AVX512VL
VPBROADCASTD ymmreg|mask|z,xmmreg AVX512VL
VPBROADCASTD zmmreg|mask|z,xmmreg AVX512
VPBROADCASTD xmmreg|mask|z,reg32 AVX512VL
VPBROADCASTD ymmreg|mask|z,reg32 AVX512VL
VPBROADCASTD zmmreg|mask|z,reg32 AVX512
VPBROADCASTMB2Q xmmreg,kreg AVX512VL/CD
VPBROADCASTMB2Q ymmreg,kreg AVX512VL/CD
VPBROADCASTMB2Q zmmreg,kreg AVX512CD
VPBROADCASTMW2D xmmreg,kreg AVX512VL/CD
VPBROADCASTMW2D ymmreg,kreg AVX512VL/CD
VPBROADCASTMW2D zmmreg,kreg AVX512CD
VPBROADCASTQ xmmreg|mask|z,mem64 AVX512VL
VPBROADCASTQ ymmreg|mask|z,mem64 AVX512VL
VPBROADCASTQ zmmreg|mask|z,mem64 AVX512
VPBROADCASTQ xmmreg|mask|z,xmmreg AVX512VL
VPBROADCASTQ ymmreg|mask|z,xmmreg AVX512VL
VPBROADCASTQ zmmreg|mask|z,xmmreg AVX512
VPBROADCASTQ xmmreg|mask|z,reg64 AVX512VL
VPBROADCASTQ ymmreg|mask|z,reg64 AVX512VL
VPBROADCASTQ zmmreg|mask|z,reg64 AVX512
VPBROADCASTW xmmreg|mask|z,xmmrm16 AVX512VL/BW
VPBROADCASTW ymmreg|mask|z,xmmrm16 AVX512VL/BW
VPBROADCASTW zmmreg|mask|z,xmmrm16 AVX512BW
VPBROADCASTW xmmreg|mask|z,reg16 AVX512VL/BW
VPBROADCASTW xmmreg|mask|z,reg32 AVX512VL/BW
VPBROADCASTW xmmreg|mask|z,reg64 AVX512VL/BW
VPBROADCASTW ymmreg|mask|z,reg16 AVX512VL/BW
VPBROADCASTW ymmreg|mask|z,reg32 AVX512VL/BW
VPBROADCASTW ymmreg|mask|z,reg64 AVX512VL/BW
VPBROADCASTW zmmreg|mask|z,reg16 AVX512BW
VPBROADCASTW zmmreg|mask|z,reg32 AVX512BW
VPBROADCASTW zmmreg|mask|z,reg64 AVX512BW
VPCMPEQB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPEQB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPEQB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPEQW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPEQW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPEQW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGTB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGTB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGTB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPGTW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGTW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGTW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPEQB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPEQB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPEQB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPEQD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPEQD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPEQD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPEQQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPEQQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPEQQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPEQUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPEQUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPEQUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPEQUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPEQUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPEQUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPEQUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPEQUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPEQUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPEQUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPEQUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPEQUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPEQW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPEQW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPEQW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGEB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGEB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGEB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGED kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPGED kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPGED kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPGEQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPGEQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPGEQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPGEUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGEUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGEUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGEUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPGEUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPGEUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPGEUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPGEUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPGEUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPGEUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGEUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGEUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGEW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGEW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGEW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGTB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGTB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGTB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGTD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPGTD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPGTD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPGTQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPGTQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPGTQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPGTUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGTUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGTUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGTUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPGTUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPGTUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPGTUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPGTUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPGTUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPGTUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGTUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGTUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPGTW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPGTW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPGTW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLEB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLEB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLEB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLED kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPLED kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPLED kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPLEQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPLEQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPLEQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPLEUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLEUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLEUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLEUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPLEUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPLEUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPLEUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPLEUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPLEUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPLEUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLEUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLEUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLEW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLEW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLEW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLTB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLTB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLTB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLTD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPLTD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPLTD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPLTQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPLTQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPLTQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPLTUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLTUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLTUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLTUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPLTUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPLTUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPLTUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPLTUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPLTUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPLTUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLTUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLTUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPLTW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPLTW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPLTW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNEQB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNEQB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNEQB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNEQD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNEQD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNEQD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNEQQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNEQQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNEQQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNEQUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNEQUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNEQUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNEQUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNEQUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNEQUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNEQUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNEQUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNEQUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNEQUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNEQUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNEQUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNEQW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNEQW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNEQW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNGTB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNGTB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNGTB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNGTD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNGTD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNGTD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNGTQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNGTQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNGTQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNGTUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNGTUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNGTUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNGTUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNGTUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNGTUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNGTUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNGTUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNGTUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNGTUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNGTUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNGTUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNGTW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNGTW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNGTW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLEB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLEB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLEB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLED kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNLED kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNLED kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNLEQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNLEQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNLEQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNLEUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLEUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLEUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLEUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNLEUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNLEUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNLEUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNLEUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNLEUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNLEUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLEUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLEUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLEW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLEW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLEW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLTB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLTB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLTB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLTD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNLTD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNLTD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNLTQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNLTQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNLTQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNLTUB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLTUB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLTUB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLTUD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPCMPNLTUD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPCMPNLTUD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPCMPNLTUQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPCMPNLTUQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPCMPNLTUQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPCMPNLTUW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLTUW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLTUW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPNLTW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPCMPNLTW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPCMPNLTW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPCMPB kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW
VPCMPB kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW
VPCMPB kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW
VPCMPD kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL
VPCMPD kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL
VPCMPD kreg|mask,zmmreg,zmmrm512|b32,imm8 AVX512
VPCMPQ kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL
VPCMPQ kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL
VPCMPQ kreg|mask,zmmreg,zmmrm512|b64,imm8 AVX512
VPCMPUB kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW
VPCMPUB kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW
VPCMPUB kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW
VPCMPUD kreg|mask,xmmreg,xmmrm128|b32,imm8 AVX512VL
VPCMPUD kreg|mask,ymmreg,ymmrm256|b32,imm8 AVX512VL
VPCMPUD kreg|mask,zmmreg,zmmrm512|b32,imm8 AVX512
VPCMPUQ kreg|mask,xmmreg,xmmrm128|b64,imm8 AVX512VL
VPCMPUQ kreg|mask,ymmreg,ymmrm256|b64,imm8 AVX512VL
VPCMPUQ kreg|mask,zmmreg,zmmrm512|b64,imm8 AVX512
VPCMPUW kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW
VPCMPUW kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW
VPCMPUW kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW
VPCMPW kreg|mask,xmmreg,xmmrm128,imm8 AVX512VL/BW
VPCMPW kreg|mask,ymmreg,ymmrm256,imm8 AVX512VL/BW
VPCMPW kreg|mask,zmmreg,zmmrm512,imm8 AVX512BW
VPCOMPRESSD mem128|mask,xmmreg AVX512VL
VPCOMPRESSD mem256|mask,ymmreg AVX512VL
VPCOMPRESSD mem512|mask,zmmreg AVX512
VPCOMPRESSD xmmreg|mask|z,xmmreg AVX512VL
VPCOMPRESSD ymmreg|mask|z,ymmreg AVX512VL
VPCOMPRESSD zmmreg|mask|z,zmmreg AVX512
VPCOMPRESSQ mem128|mask,xmmreg AVX512VL
VPCOMPRESSQ mem256|mask,ymmreg AVX512VL
VPCOMPRESSQ mem512|mask,zmmreg AVX512
VPCOMPRESSQ xmmreg|mask|z,xmmreg AVX512VL
VPCOMPRESSQ ymmreg|mask|z,ymmreg AVX512VL
VPCOMPRESSQ zmmreg|mask|z,zmmreg AVX512
VPCONFLICTD xmmreg|mask|z,xmmrm128|b32 AVX512VL/CD
VPCONFLICTD ymmreg|mask|z,ymmrm256|b32 AVX512VL/CD
VPCONFLICTD zmmreg|mask|z,zmmrm512|b32 AVX512CD
VPCONFLICTQ xmmreg|mask|z,xmmrm128|b64 AVX512VL/CD
VPCONFLICTQ ymmreg|mask|z,ymmrm256|b64 AVX512VL/CD
VPCONFLICTQ zmmreg|mask|z,zmmrm512|b64 AVX512CD
VPERMB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/VBMI
VPERMB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/VBMI
VPERMB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI
VPERMD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPERMD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPERMI2B xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/VBMI
VPERMI2B ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/VBMI
VPERMI2B zmmreg|mask|z,zmmreg,zmmrm512 AVX512VBMI
VPERMI2D xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VPERMI2D ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VPERMI2D zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512
VPERMI2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VPERMI2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VPERMI2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512
VPERMI2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VPERMI2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VPERMI2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512
VPERMI2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VPERMI2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VPERMI2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512
VPERMI2W xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW
VPERMI2W ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW
VPERMI2W zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW
VPERMILPD xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL
VPERMILPD ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL
VPERMILPD zmmreg|mask|z,zmmrm512|b64,imm8 AVX512
VPERMILPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPERMILPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPERMILPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPERMILPS xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL
VPERMILPS ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL
VPERMILPS zmmreg|mask|z,zmmrm512|b32,imm8 AVX512
VPERMILPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPERMILPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPERMILPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPERMPD ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL
VPERMPD zmmreg|mask|z,zmmrm512|b64,imm8 AVX512
VPERMPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPERMPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPERMPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPERMPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPERMQ ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL
VPERMQ zmmreg|mask|z,zmmrm512|b64,imm8 AVX512
VPERMQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPERMQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPERMT2B xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/VBMI
VPERMT2B ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/VBMI
VPERMT2B zmmreg|mask|z,zmmreg,zmmrm512 AVX512VBMI
VPERMT2D xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VPERMT2D ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VPERMT2D zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512
VPERMT2PD xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VPERMT2PD ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VPERMT2PD zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512
VPERMT2PS xmmreg|mask|z,xmmreg,xmmrm128|b32 AVX512VL
VPERMT2PS ymmreg|mask|z,ymmreg,ymmrm256|b32 AVX512VL
VPERMT2PS zmmreg|mask|z,zmmreg,zmmrm512|b32 AVX512
VPERMT2Q xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL
VPERMT2Q ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL
VPERMT2Q zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512
VPERMT2W xmmreg|mask|z,xmmreg,xmmrm128 AVX512VL/BW
VPERMT2W ymmreg|mask|z,ymmreg,ymmrm256 AVX512VL/BW
VPERMT2W zmmreg|mask|z,zmmreg,zmmrm512 AVX512BW
VPERMW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPERMW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPERMW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPEXPANDD xmmreg|mask|z,mem128 AVX512VL
VPEXPANDD ymmreg|mask|z,mem256 AVX512VL
VPEXPANDD zmmreg|mask|z,mem512 AVX512
VPEXPANDD xmmreg|mask|z,xmmreg AVX512VL
VPEXPANDD ymmreg|mask|z,ymmreg AVX512VL
VPEXPANDD zmmreg|mask|z,zmmreg AVX512
VPEXPANDQ xmmreg|mask|z,mem128 AVX512VL
VPEXPANDQ ymmreg|mask|z,mem256 AVX512VL
VPEXPANDQ zmmreg|mask|z,mem512 AVX512
VPEXPANDQ xmmreg|mask|z,xmmreg AVX512VL
VPEXPANDQ ymmreg|mask|z,ymmreg AVX512VL
VPEXPANDQ zmmreg|mask|z,zmmreg AVX512
VPEXTRB reg8,xmmreg,imm8 AVX512BW
VPEXTRB reg16,xmmreg,imm8 AVX512BW
VPEXTRB reg32,xmmreg,imm8 AVX512BW
VPEXTRB reg64,xmmreg,imm8 AVX512BW
VPEXTRB mem8,xmmreg,imm8 AVX512BW
VPEXTRD rm32,xmmreg,imm8 AVX512DQ
VPEXTRQ rm64,xmmreg,imm8 AVX512DQ
VPEXTRW reg16,xmmreg,imm8 AVX512BW
VPEXTRW reg32,xmmreg,imm8 AVX512BW
VPEXTRW reg64,xmmreg,imm8 AVX512BW
VPEXTRW mem16,xmmreg,imm8 AVX512BW
VPEXTRW reg16,xmmreg,imm8 AVX512BW
VPEXTRW reg32,xmmreg,imm8 AVX512BW
VPEXTRW reg64,xmmreg,imm8 AVX512BW
VPGATHERDD xmmreg|mask,xmem32 AVX512VL
VPGATHERDD ymmreg|mask,ymem32 AVX512VL
VPGATHERDD zmmreg|mask,zmem32 AVX512
VPGATHERDQ xmmreg|mask,xmem64 AVX512VL
VPGATHERDQ ymmreg|mask,xmem64 AVX512VL
VPGATHERDQ zmmreg|mask,ymem64 AVX512
VPGATHERQD xmmreg|mask,xmem32 AVX512VL
VPGATHERQD xmmreg|mask,ymem32 AVX512VL
VPGATHERQD ymmreg|mask,zmem32 AVX512
VPGATHERQQ xmmreg|mask,xmem64 AVX512VL
VPGATHERQQ ymmreg|mask,ymem64 AVX512VL
VPGATHERQQ zmmreg|mask,zmem64 AVX512
VPINSRB xmmreg,xmmreg*,reg32,imm8 AVX512BW
VPINSRB xmmreg,xmmreg*,mem8,imm8 AVX512BW
VPINSRD xmmreg,xmmreg*,rm32,imm8 AVX512DQ
VPINSRQ xmmreg,xmmreg*,rm64,imm8 AVX512DQ
VPINSRW xmmreg,xmmreg*,reg32,imm8 AVX512BW
VPINSRW xmmreg,xmmreg*,mem16,imm8 AVX512BW
VPLZCNTD xmmreg|mask|z,xmmrm128|b32 AVX512VL/CD
VPLZCNTD ymmreg|mask|z,ymmrm256|b32 AVX512VL/CD
VPLZCNTD zmmreg|mask|z,zmmrm512|b32 AVX512CD
VPLZCNTQ xmmreg|mask|z,xmmrm128|b64 AVX512VL/CD
VPLZCNTQ ymmreg|mask|z,ymmrm256|b64 AVX512VL/CD
VPLZCNTQ zmmreg|mask|z,zmmrm512|b64 AVX512CD
VPMADD52HUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL/IFMA
VPMADD52HUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL/IFMA
VPMADD52HUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512IFMA
VPMADD52LUQ xmmreg|mask|z,xmmreg,xmmrm128|b64 AVX512VL/IFMA
VPMADD52LUQ ymmreg|mask|z,ymmreg,ymmrm256|b64 AVX512VL/IFMA
VPMADD52LUQ zmmreg|mask|z,zmmreg,zmmrm512|b64 AVX512IFMA
VPMADDUBSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMADDUBSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMADDUBSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMADDWD xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMADDWD ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMADDWD zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMAXSB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMAXSB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMAXSB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMAXSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPMAXSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPMAXSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPMAXSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPMAXSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPMAXSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPMAXSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMAXSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMAXSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMAXUB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMAXUB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMAXUB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMAXUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPMAXUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPMAXUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPMAXUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPMAXUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPMAXUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPMAXUW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMAXUW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMAXUW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMINSB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMINSB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMINSB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMINSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPMINSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPMINSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPMINSQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPMINSQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPMINSQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPMINSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMINSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMINSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMINUB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMINUB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMINUB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMINUD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPMINUD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPMINUD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPMINUQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPMINUQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPMINUQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPMINUW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMINUW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMINUW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMOVB2M kreg,xmmreg AVX512VL/BW
VPMOVB2M kreg,ymmreg AVX512VL/BW
VPMOVB2M kreg,zmmreg AVX512BW
VPMOVD2M kreg,xmmreg AVX512VL/DQ
VPMOVD2M kreg,ymmreg AVX512VL/DQ
VPMOVD2M kreg,zmmreg AVX512DQ
VPMOVDB xmmreg|mask|z,xmmreg AVX512VL
VPMOVDB xmmreg|mask|z,ymmreg AVX512VL
VPMOVDB xmmreg|mask|z,zmmreg AVX512
VPMOVDB mem32|mask,xmmreg AVX512VL
VPMOVDB mem64|mask,ymmreg AVX512VL
VPMOVDB mem128|mask,zmmreg AVX512
VPMOVDW xmmreg|mask|z,xmmreg AVX512VL
VPMOVDW xmmreg|mask|z,ymmreg AVX512VL
VPMOVDW ymmreg|mask|z,zmmreg AVX512
VPMOVDW mem64|mask,xmmreg AVX512VL
VPMOVDW mem128|mask,ymmreg AVX512VL
VPMOVDW mem256|mask,zmmreg AVX512
VPMOVM2B xmmreg,kreg AVX512VL/BW
VPMOVM2B ymmreg,kreg AVX512VL/BW
VPMOVM2B zmmreg,kreg AVX512BW
VPMOVM2D xmmreg,kreg AVX512VL/DQ
VPMOVM2D ymmreg,kreg AVX512VL/DQ
VPMOVM2D zmmreg,kreg AVX512DQ
VPMOVM2Q xmmreg,kreg AVX512VL/DQ
VPMOVM2Q ymmreg,kreg AVX512VL/DQ
VPMOVM2Q zmmreg,kreg AVX512DQ
VPMOVM2W xmmreg,kreg AVX512VL/BW
VPMOVM2W ymmreg,kreg AVX512VL/BW
VPMOVM2W zmmreg,kreg AVX512BW
VPMOVQ2M kreg,xmmreg AVX512VL/DQ
VPMOVQ2M kreg,ymmreg AVX512VL/DQ
VPMOVQ2M kreg,zmmreg AVX512DQ
VPMOVQB xmmreg|mask|z,xmmreg AVX512VL
VPMOVQB xmmreg|mask|z,ymmreg AVX512VL
VPMOVQB xmmreg|mask|z,zmmreg AVX512
VPMOVQB mem16|mask,xmmreg AVX512VL
VPMOVQB mem32|mask,ymmreg AVX512VL
VPMOVQB mem64|mask,zmmreg AVX512
VPMOVQD xmmreg|mask|z,xmmreg AVX512VL
VPMOVQD xmmreg|mask|z,ymmreg AVX512VL
VPMOVQD ymmreg|mask|z,zmmreg AVX512
VPMOVQD mem64|mask,xmmreg AVX512VL
VPMOVQD mem128|mask,ymmreg AVX512VL
VPMOVQD mem256|mask,zmmreg AVX512
VPMOVQW xmmreg|mask|z,xmmreg AVX512VL
VPMOVQW xmmreg|mask|z,ymmreg AVX512VL
VPMOVQW xmmreg|mask|z,zmmreg AVX512
VPMOVQW mem32|mask,xmmreg AVX512VL
VPMOVQW mem64|mask,ymmreg AVX512VL
VPMOVQW mem128|mask,zmmreg AVX512
VPMOVSDB xmmreg|mask|z,xmmreg AVX512VL
VPMOVSDB xmmreg|mask|z,ymmreg AVX512VL
VPMOVSDB xmmreg|mask|z,zmmreg AVX512
VPMOVSDB mem32|mask,xmmreg AVX512VL
VPMOVSDB mem64|mask,ymmreg AVX512VL
VPMOVSDB mem128|mask,zmmreg AVX512
VPMOVSDW xmmreg|mask|z,xmmreg AVX512VL
VPMOVSDW xmmreg|mask|z,ymmreg AVX512VL
VPMOVSDW ymmreg|mask|z,zmmreg AVX512
VPMOVSDW mem64|mask,xmmreg AVX512VL
VPMOVSDW mem128|mask,ymmreg AVX512VL
VPMOVSDW mem256|mask,zmmreg AVX512
VPMOVSQB xmmreg|mask|z,xmmreg AVX512VL
VPMOVSQB xmmreg|mask|z,ymmreg AVX512VL
VPMOVSQB xmmreg|mask|z,zmmreg AVX512
VPMOVSQB mem16|mask,xmmreg AVX512VL
VPMOVSQB mem32|mask,ymmreg AVX512VL
VPMOVSQB mem64|mask,zmmreg AVX512
VPMOVSQD xmmreg|mask|z,xmmreg AVX512VL
VPMOVSQD xmmreg|mask|z,ymmreg AVX512VL
VPMOVSQD ymmreg|mask|z,zmmreg AVX512
VPMOVSQD mem64|mask,xmmreg AVX512VL
VPMOVSQD mem128|mask,ymmreg AVX512VL
VPMOVSQD mem256|mask,zmmreg AVX512
VPMOVSQW xmmreg|mask|z,xmmreg AVX512VL
VPMOVSQW xmmreg|mask|z,ymmreg AVX512VL
VPMOVSQW xmmreg|mask|z,zmmreg AVX512
VPMOVSQW mem32|mask,xmmreg AVX512VL
VPMOVSQW mem64|mask,ymmreg AVX512VL
VPMOVSQW mem128|mask,zmmreg AVX512
VPMOVSWB xmmreg|mask|z,xmmreg AVX512VL/BW
VPMOVSWB xmmreg|mask|z,ymmreg AVX512VL/BW
VPMOVSWB ymmreg|mask|z,zmmreg AVX512BW
VPMOVSWB mem64|mask,xmmreg AVX512VL/BW
VPMOVSWB mem128|mask,ymmreg AVX512VL/BW
VPMOVSWB mem256|mask,zmmreg AVX512BW
VPMOVSXBD xmmreg|mask|z,xmmrm32 AVX512VL
VPMOVSXBD ymmreg|mask|z,xmmrm64 AVX512VL
VPMOVSXBD zmmreg|mask|z,xmmrm128 AVX512
VPMOVSXBQ xmmreg|mask|z,xmmrm16 AVX512VL
VPMOVSXBQ ymmreg|mask|z,xmmrm32 AVX512VL
VPMOVSXBQ zmmreg|mask|z,xmmrm64 AVX512
VPMOVSXBW xmmreg|mask|z,xmmrm64 AVX512VL/BW
VPMOVSXBW ymmreg|mask|z,xmmrm128 AVX512VL/BW
VPMOVSXBW zmmreg|mask|z,ymmrm256 AVX512BW
VPMOVSXDQ xmmreg|mask|z,xmmrm64 AVX512VL
VPMOVSXDQ ymmreg|mask|z,xmmrm128 AVX512VL
VPMOVSXDQ zmmreg|mask|z,ymmrm256 AVX512
VPMOVSXWD xmmreg|mask|z,xmmrm64 AVX512VL
VPMOVSXWD ymmreg|mask|z,xmmrm128 AVX512VL
VPMOVSXWD zmmreg|mask|z,ymmrm256 AVX512
VPMOVSXWQ xmmreg|mask|z,xmmrm32 AVX512VL
VPMOVSXWQ ymmreg|mask|z,xmmrm64 AVX512VL
VPMOVSXWQ zmmreg|mask|z,xmmrm128 AVX512
VPMOVUSDB xmmreg|mask|z,xmmreg AVX512VL
VPMOVUSDB xmmreg|mask|z,ymmreg AVX512VL
VPMOVUSDB xmmreg|mask|z,zmmreg AVX512
VPMOVUSDB mem32|mask,xmmreg AVX512VL
VPMOVUSDB mem64|mask,ymmreg AVX512VL
VPMOVUSDB mem128|mask,zmmreg AVX512
VPMOVUSDW xmmreg|mask|z,xmmreg AVX512VL
VPMOVUSDW xmmreg|mask|z,ymmreg AVX512VL
VPMOVUSDW ymmreg|mask|z,zmmreg AVX512
VPMOVUSDW mem64|mask,xmmreg AVX512VL
VPMOVUSDW mem128|mask,ymmreg AVX512VL
VPMOVUSDW mem256|mask,zmmreg AVX512
VPMOVUSQB xmmreg|mask|z,xmmreg AVX512VL
VPMOVUSQB xmmreg|mask|z,ymmreg AVX512VL
VPMOVUSQB xmmreg|mask|z,zmmreg AVX512
VPMOVUSQB mem16|mask,xmmreg AVX512VL
VPMOVUSQB mem32|mask,ymmreg AVX512VL
VPMOVUSQB mem64|mask,zmmreg AVX512
VPMOVUSQD xmmreg|mask|z,xmmreg AVX512VL
VPMOVUSQD xmmreg|mask|z,ymmreg AVX512VL
VPMOVUSQD ymmreg|mask|z,zmmreg AVX512
VPMOVUSQD mem64|mask,xmmreg AVX512VL
VPMOVUSQD mem128|mask,ymmreg AVX512VL
VPMOVUSQD mem256|mask,zmmreg AVX512
VPMOVUSQW xmmreg|mask|z,xmmreg AVX512VL
VPMOVUSQW xmmreg|mask|z,ymmreg AVX512VL
VPMOVUSQW xmmreg|mask|z,zmmreg AVX512
VPMOVUSQW mem32|mask,xmmreg AVX512VL
VPMOVUSQW mem64|mask,ymmreg AVX512VL
VPMOVUSQW mem128|mask,zmmreg AVX512
VPMOVUSWB xmmreg|mask|z,xmmreg AVX512VL/BW
VPMOVUSWB xmmreg|mask|z,ymmreg AVX512VL/BW
VPMOVUSWB ymmreg|mask|z,zmmreg AVX512BW
VPMOVUSWB mem64|mask,xmmreg AVX512VL/BW
VPMOVUSWB mem128|mask,ymmreg AVX512VL/BW
VPMOVUSWB mem256|mask,zmmreg AVX512BW
VPMOVW2M kreg,xmmreg AVX512VL/BW
VPMOVW2M kreg,ymmreg AVX512VL/BW
VPMOVW2M kreg,zmmreg AVX512BW
VPMOVWB xmmreg|mask|z,xmmreg AVX512VL/BW
VPMOVWB xmmreg|mask|z,ymmreg AVX512VL/BW
VPMOVWB ymmreg|mask|z,zmmreg AVX512BW
VPMOVWB mem64|mask,xmmreg AVX512VL/BW
VPMOVWB mem128|mask,ymmreg AVX512VL/BW
VPMOVWB mem256|mask,zmmreg AVX512BW
VPMOVZXBD xmmreg|mask|z,xmmrm32 AVX512VL
VPMOVZXBD ymmreg|mask|z,xmmrm64 AVX512VL
VPMOVZXBD zmmreg|mask|z,xmmrm128 AVX512
VPMOVZXBQ xmmreg|mask|z,xmmrm16 AVX512VL
VPMOVZXBQ ymmreg|mask|z,xmmrm32 AVX512VL
VPMOVZXBQ zmmreg|mask|z,xmmrm64 AVX512
VPMOVZXBW xmmreg|mask|z,xmmrm64 AVX512VL/BW
VPMOVZXBW ymmreg|mask|z,xmmrm128 AVX512VL/BW
VPMOVZXBW zmmreg|mask|z,ymmrm256 AVX512BW
VPMOVZXDQ xmmreg|mask|z,xmmrm64 AVX512VL
VPMOVZXDQ ymmreg|mask|z,xmmrm128 AVX512VL
VPMOVZXDQ zmmreg|mask|z,ymmrm256 AVX512
VPMOVZXWD xmmreg|mask|z,xmmrm64 AVX512VL
VPMOVZXWD ymmreg|mask|z,xmmrm128 AVX512VL
VPMOVZXWD zmmreg|mask|z,ymmrm256 AVX512
VPMOVZXWQ xmmreg|mask|z,xmmrm32 AVX512VL
VPMOVZXWQ ymmreg|mask|z,xmmrm64 AVX512VL
VPMOVZXWQ zmmreg|mask|z,xmmrm128 AVX512
VPMULDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPMULDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPMULDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPMULHRSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMULHRSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMULHRSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMULHUW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMULHUW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMULHUW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMULHW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMULHW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMULHW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMULLD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPMULLD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPMULLD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPMULLQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ
VPMULLQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ
VPMULLQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ
VPMULLW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPMULLW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPMULLW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPMULTISHIFTQB xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/VBMI
VPMULTISHIFTQB ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/VBMI
VPMULTISHIFTQB zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI
VPMULUDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPMULUDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPMULUDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPROLD xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL
VPROLD ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL
VPROLD zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512
VPROLQ xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL
VPROLQ ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL
VPROLQ zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512
VPROLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPROLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPROLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPROLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPROLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPROLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPRORD xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL
VPRORD ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL
VPRORD zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512
VPRORQ xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL
VPRORQ ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL
VPRORQ zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512
VPRORVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPRORVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPRORVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPRORVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPRORVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPRORVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPSADBW xmmreg,xmmreg*,xmmrm128 AVX512VL/BW
VPSADBW ymmreg,ymmreg*,ymmrm256 AVX512VL/BW
VPSADBW zmmreg,zmmreg*,zmmrm512 AVX512BW
VPSCATTERDD xmem32|mask,xmmreg AVX512VL
VPSCATTERDD ymem32|mask,ymmreg AVX512VL
VPSCATTERDD zmem32|mask,zmmreg AVX512
VPSCATTERDQ xmem64|mask,xmmreg AVX512VL
VPSCATTERDQ xmem64|mask,ymmreg AVX512VL
VPSCATTERDQ ymem64|mask,zmmreg AVX512
VPSCATTERQD xmem32|mask,xmmreg AVX512VL
VPSCATTERQD ymem32|mask,xmmreg AVX512VL
VPSCATTERQD zmem32|mask,ymmreg AVX512
VPSCATTERQQ xmem64|mask,xmmreg AVX512VL
VPSCATTERQQ ymem64|mask,ymmreg AVX512VL
VPSCATTERQQ zmem64|mask,zmmreg AVX512
VPSHUFB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSHUFB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSHUFB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSHUFD xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL
VPSHUFD ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL
VPSHUFD zmmreg|mask|z,zmmrm512|b32,imm8 AVX512
VPSHUFHW xmmreg|mask|z,xmmrm128,imm8 AVX512VL/BW
VPSHUFHW ymmreg|mask|z,ymmrm256,imm8 AVX512VL/BW
VPSHUFHW zmmreg|mask|z,zmmrm512,imm8 AVX512BW
VPSHUFLW xmmreg|mask|z,xmmrm128,imm8 AVX512VL/BW
VPSHUFLW ymmreg|mask|z,ymmrm256,imm8 AVX512VL/BW
VPSHUFLW zmmreg|mask|z,zmmrm512,imm8 AVX512BW
VPSLLD xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL
VPSLLD ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL
VPSLLD zmmreg|mask|z,zmmreg*,xmmrm128 AVX512
VPSLLD xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL
VPSLLD ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL
VPSLLD zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512
VPSLLDQ xmmreg,xmmrm128*,imm8 AVX512VL/BW
VPSLLDQ ymmreg,ymmrm256*,imm8 AVX512VL/BW
VPSLLDQ zmmreg,zmmrm512*,imm8 AVX512BW
VPSLLQ xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL
VPSLLQ ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL
VPSLLQ zmmreg|mask|z,zmmreg*,xmmrm128 AVX512
VPSLLQ xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL
VPSLLQ ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL
VPSLLQ zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512
VPSLLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPSLLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPSLLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPSLLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPSLLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPSLLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPSLLVW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSLLVW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSLLVW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSLLW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSLLW ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW
VPSLLW zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW
VPSLLW xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW
VPSLLW ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW
VPSLLW zmmreg|mask|z,zmmrm512*,imm8 AVX512BW
VPSRAD xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL
VPSRAD ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL
VPSRAD zmmreg|mask|z,zmmreg*,xmmrm128 AVX512
VPSRAD xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL
VPSRAD ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL
VPSRAD zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512
VPSRAQ xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL
VPSRAQ ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL
VPSRAQ zmmreg|mask|z,zmmreg*,xmmrm128 AVX512
VPSRAQ xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL
VPSRAQ ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL
VPSRAQ zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512
VPSRAVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPSRAVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPSRAVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPSRAVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPSRAVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPSRAVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPSRAVW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSRAVW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSRAVW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSRAW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSRAW ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW
VPSRAW zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW
VPSRAW xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW
VPSRAW ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW
VPSRAW zmmreg|mask|z,zmmrm512*,imm8 AVX512BW
VPSRLD xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL
VPSRLD ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL
VPSRLD zmmreg|mask|z,zmmreg*,xmmrm128 AVX512
VPSRLD xmmreg|mask|z,xmmrm128|b32*,imm8 AVX512VL
VPSRLD ymmreg|mask|z,ymmrm256|b32*,imm8 AVX512VL
VPSRLD zmmreg|mask|z,zmmrm512|b32*,imm8 AVX512
VPSRLDQ xmmreg,xmmrm128*,imm8 AVX512VL/BW
VPSRLDQ ymmreg,ymmrm256*,imm8 AVX512VL/BW
VPSRLDQ zmmreg,zmmrm512*,imm8 AVX512BW
VPSRLQ xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL
VPSRLQ ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL
VPSRLQ zmmreg|mask|z,zmmreg*,xmmrm128 AVX512
VPSRLQ xmmreg|mask|z,xmmrm128|b64*,imm8 AVX512VL
VPSRLQ ymmreg|mask|z,ymmrm256|b64*,imm8 AVX512VL
VPSRLQ zmmreg|mask|z,zmmrm512|b64*,imm8 AVX512
VPSRLVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPSRLVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPSRLVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPSRLVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPSRLVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPSRLVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPSRLVW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSRLVW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSRLVW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSRLW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSRLW ymmreg|mask|z,ymmreg*,xmmrm128 AVX512VL/BW
VPSRLW zmmreg|mask|z,zmmreg*,xmmrm128 AVX512BW
VPSRLW xmmreg|mask|z,xmmrm128*,imm8 AVX512VL/BW
VPSRLW ymmreg|mask|z,ymmrm256*,imm8 AVX512VL/BW
VPSRLW zmmreg|mask|z,zmmrm512*,imm8 AVX512BW
VPSUBB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSUBB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSUBB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSUBD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPSUBD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPSUBD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPSUBQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPSUBQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPSUBQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPSUBSB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSUBSB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSUBSB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSUBSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSUBSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSUBSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSUBUSB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSUBUSB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSUBUSB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSUBUSW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSUBUSW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSUBUSW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPSUBW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPSUBW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPSUBW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPTERNLOGD xmmreg|mask|z,xmmreg,xmmrm128|b32,imm8 AVX512VL
VPTERNLOGD ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 AVX512VL
VPTERNLOGD zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 AVX512
VPTERNLOGQ xmmreg|mask|z,xmmreg,xmmrm128|b64,imm8 AVX512VL
VPTERNLOGQ ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 AVX512VL
VPTERNLOGQ zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 AVX512
VPTESTMB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPTESTMB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPTESTMB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPTESTMD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPTESTMD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPTESTMD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPTESTMQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPTESTMQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPTESTMQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPTESTMW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPTESTMW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPTESTMW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPTESTNMB kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPTESTNMB kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPTESTNMB kreg|mask,zmmreg,zmmrm512 AVX512BW
VPTESTNMD kreg|mask,xmmreg,xmmrm128|b32 AVX512VL
VPTESTNMD kreg|mask,ymmreg,ymmrm256|b32 AVX512VL
VPTESTNMD kreg|mask,zmmreg,zmmrm512|b32 AVX512
VPTESTNMQ kreg|mask,xmmreg,xmmrm128|b64 AVX512VL
VPTESTNMQ kreg|mask,ymmreg,ymmrm256|b64 AVX512VL
VPTESTNMQ kreg|mask,zmmreg,zmmrm512|b64 AVX512
VPTESTNMW kreg|mask,xmmreg,xmmrm128 AVX512VL/BW
VPTESTNMW kreg|mask,ymmreg,ymmrm256 AVX512VL/BW
VPTESTNMW kreg|mask,zmmreg,zmmrm512 AVX512BW
VPUNPCKHBW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPUNPCKHBW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPUNPCKHBW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPUNPCKHDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPUNPCKHDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPUNPCKHDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPUNPCKHQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPUNPCKHQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPUNPCKHQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPUNPCKHWD xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPUNPCKHWD ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPUNPCKHWD zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPUNPCKLBW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPUNPCKLBW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPUNPCKLBW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPUNPCKLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPUNPCKLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPUNPCKLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPUNPCKLQDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPUNPCKLQDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPUNPCKLQDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VPUNPCKLWD xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL/BW
VPUNPCKLWD ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL/BW
VPUNPCKLWD zmmreg|mask|z,zmmreg*,zmmrm512 AVX512BW
VPXORD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VPXORD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VPXORD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VPXORQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VPXORQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VPXORQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VRANGEPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL/DQ
VRANGEPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL/DQ
VRANGEPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|sae,imm8 AVX512DQ
VRANGEPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL/DQ
VRANGEPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL/DQ
VRANGEPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|sae,imm8 AVX512DQ
VRANGESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512DQ
VRANGESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512DQ
VRCP14PD xmmreg|mask|z,xmmrm128|b64 AVX512VL
VRCP14PD ymmreg|mask|z,ymmrm256|b64 AVX512VL
VRCP14PD zmmreg|mask|z,zmmrm512|b64 AVX512
VRCP14PS xmmreg|mask|z,xmmrm128|b32 AVX512VL
VRCP14PS ymmreg|mask|z,ymmrm256|b32 AVX512VL
VRCP14PS zmmreg|mask|z,zmmrm512|b32 AVX512
VRCP14SD xmmreg|mask|z,xmmreg*,xmmrm64 AVX512
VRCP14SS xmmreg|mask|z,xmmreg*,xmmrm32 AVX512
VRCP28PD zmmreg|mask|z,zmmrm512|b64|sae AVX512ER
VRCP28PS zmmreg|mask|z,zmmrm512|b32|sae AVX512ER
VRCP28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512ER
VRCP28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512ER
VREDUCEPD xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL/DQ
VREDUCEPD ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL/DQ
VREDUCEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512DQ
VREDUCEPS xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL/DQ
VREDUCEPS ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL/DQ
VREDUCEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512DQ
VREDUCESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512DQ
VREDUCESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512DQ
VRNDSCALEPD xmmreg|mask|z,xmmrm128|b64,imm8 AVX512VL
VRNDSCALEPD ymmreg|mask|z,ymmrm256|b64,imm8 AVX512VL
VRNDSCALEPD zmmreg|mask|z,zmmrm512|b64|sae,imm8 AVX512
VRNDSCALEPS xmmreg|mask|z,xmmrm128|b32,imm8 AVX512VL
VRNDSCALEPS ymmreg|mask|z,ymmrm256|b32,imm8 AVX512VL
VRNDSCALEPS zmmreg|mask|z,zmmrm512|b32|sae,imm8 AVX512
VRNDSCALESD xmmreg|mask|z,xmmreg*,xmmrm64|sae,imm8 AVX512
VRNDSCALESS xmmreg|mask|z,xmmreg*,xmmrm32|sae,imm8 AVX512
VRSQRT14PD xmmreg|mask|z,xmmrm128|b64 AVX512VL
VRSQRT14PD ymmreg|mask|z,ymmrm256|b64 AVX512VL
VRSQRT14PD zmmreg|mask|z,zmmrm512|b64 AVX512
VRSQRT14PS xmmreg|mask|z,xmmrm128|b32 AVX512VL
VRSQRT14PS ymmreg|mask|z,ymmrm256|b32 AVX512VL
VRSQRT14PS zmmreg|mask|z,zmmrm512|b32 AVX512
VRSQRT14SD xmmreg|mask|z,xmmreg*,xmmrm64 AVX512
VRSQRT14SS xmmreg|mask|z,xmmreg*,xmmrm32 AVX512
VRSQRT28PD zmmreg|mask|z,zmmrm512|b64|sae AVX512ER
VRSQRT28PS zmmreg|mask|z,zmmrm512|b32|sae AVX512ER
VRSQRT28SD xmmreg|mask|z,xmmreg*,xmmrm64|sae AVX512ER
VRSQRT28SS xmmreg|mask|z,xmmreg*,xmmrm32|sae AVX512ER
VSCALEFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VSCALEFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VSCALEFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512
VSCALEFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VSCALEFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VSCALEFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512
VSCALEFSD xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512
VSCALEFSS xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512
VSCATTERDPD xmem64|mask,xmmreg AVX512VL
VSCATTERDPD xmem64|mask,ymmreg AVX512VL
VSCATTERDPD ymem64|mask,zmmreg AVX512
VSCATTERDPS xmem32|mask,xmmreg AVX512VL
VSCATTERDPS ymem32|mask,ymmreg AVX512VL
VSCATTERDPS zmem32|mask,zmmreg AVX512
VSCATTERPF0DPD ymem64|mask AVX512PF
VSCATTERPF0DPS zmem32|mask AVX512PF
VSCATTERPF0QPD zmem64|mask AVX512PF
VSCATTERPF0QPS zmem32|mask AVX512PF
VSCATTERPF1DPD ymem64|mask AVX512PF
VSCATTERPF1DPS zmem32|mask AVX512PF
VSCATTERPF1QPD zmem64|mask AVX512PF
VSCATTERPF1QPS zmem32|mask AVX512PF
VSCATTERQPD xmem64|mask,xmmreg AVX512VL
VSCATTERQPD ymem64|mask,ymmreg AVX512VL
VSCATTERQPD zmem64|mask,zmmreg AVX512
VSCATTERQPS xmem32|mask,xmmreg AVX512VL
VSCATTERQPS ymem32|mask,xmmreg AVX512VL
VSCATTERQPS zmem32|mask,ymmreg AVX512
VSHUFF32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL
VSHUFF32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512
VSHUFF64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL
VSHUFF64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512
VSHUFI32X4 ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL
VSHUFI32X4 zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512
VSHUFI64X2 ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL
VSHUFI64X2 zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512
VSHUFPD xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL
VSHUFPD ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL
VSHUFPD zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512
VSHUFPS xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VL
VSHUFPS ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VL
VSHUFPS zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512
VSQRTPD xmmreg|mask|z,xmmrm128|b64 AVX512VL
VSQRTPD ymmreg|mask|z,ymmrm256|b64 AVX512VL
VSQRTPD zmmreg|mask|z,zmmrm512|b64|er AVX512
VSQRTPS xmmreg|mask|z,xmmrm128|b32 AVX512VL
VSQRTPS ymmreg|mask|z,ymmrm256|b32 AVX512VL
VSQRTPS zmmreg|mask|z,zmmrm512|b32|er AVX512
VSQRTSD xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512
VSQRTSS xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512
VSUBPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VSUBPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VSUBPD zmmreg|mask|z,zmmreg*,zmmrm512|b64|er AVX512
VSUBPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VSUBPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VSUBPS zmmreg|mask|z,zmmreg*,zmmrm512|b32|er AVX512
VSUBSD xmmreg|mask|z,xmmreg*,xmmrm64|er AVX512
VSUBSS xmmreg|mask|z,xmmreg*,xmmrm32|er AVX512
VUCOMISD xmmreg,xmmrm64|sae AVX512
VUCOMISS xmmreg,xmmrm32|sae AVX512
VUNPCKHPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VUNPCKHPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VUNPCKHPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VUNPCKHPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VUNPCKHPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VUNPCKHPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VUNPCKLPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL
VUNPCKLPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL
VUNPCKLPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512
VUNPCKLPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL
VUNPCKLPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL
VUNPCKLPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512
VXORPD xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VL/DQ
VXORPD ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VL/DQ
VXORPD zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512DQ
VXORPS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VL/DQ
VXORPS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VL/DQ
VXORPS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512DQ
B.1.42 Intel memory protection keys for userspace (PKU aka PKEYs)
RDPKRU LONG
WRPKRU LONG
B.1.43 Read Processor ID
RDPID reg32 NOLONG
RDPID reg64 LONG
RDPID reg32 LONG,UNDOC
B.1.44 New memory instructions
CLFLUSHOPT mem
CLWB mem
PCOMMIT NEVER,NOP
CLZERO AMD
CLZERO reg_ax AMD,ND,NOLONG
CLZERO reg_eax AMD,ND
CLZERO reg_rax AMD,ND,LONG
B.1.45 Processor trace write
PTWRITE rm32
PTWRITE rm64 LONG
B.1.46 Instructions from the Intel Instruction Set Extensions,
B.1.47 doc 319433-034 May 2018
CLDEMOTE mem
MOVDIRI mem32,reg32 SD
MOVDIRI mem64,reg64 LONG
MOVDIR64B reg16,mem512 NOLONG
MOVDIR64B reg32,mem512
MOVDIR64B reg64,mem512 LONG
PCONFIG
TPAUSE reg32
TPAUSE reg32,reg_edx,reg_eax ND
UMONITOR reg16 NOLONG
UMONITOR reg32
UMONITOR reg64 LONG
UMWAIT reg32
UMWAIT reg32,reg_edx,reg_eax ND
WBNOINVD
B.1.48 Galois field operations (GFNI)
GF2P8AFFINEINVQB xmmreg,xmmrm128,imm8 GFNI,SSE
VGF2P8AFFINEINVQB xmmreg,xmmreg*,xmmrm128,imm8 GFNI,AVX
VGF2P8AFFINEINVQB ymmreg,ymmreg*,ymmrm256,imm8 GFNI,AVX
VGF2P8AFFINEINVQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL,GFNI
VGF2P8AFFINEINVQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL,GFNI
VGF2P8AFFINEINVQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512,GFNI
GF2P8AFFINEQB xmmreg,xmmrm128,imm8 GFNI,SSE
VGF2P8AFFINEQB xmmreg,xmmreg*,xmmrm128,imm8 GFNI,AVX
VGF2P8AFFINEQB ymmreg,ymmreg*,ymmrm256,imm8 GFNI,AVX
VGF2P8AFFINEQB xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VL,GFNI
VGF2P8AFFINEQB ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VL,GFNI
VGF2P8AFFINEQB zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512,GFNI
GF2P8MULB xmmreg,xmmrm128 GFNI,SSE
VGF2P8MULB xmmreg,xmmreg*,xmmrm128 GFNI,AVX
VGF2P8MULB ymmreg,ymmreg*,ymmrm256 GFNI,AVX
VGF2P8MULB xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VL,GFNI
VGF2P8MULB ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VL,GFNI
VGF2P8MULB zmmreg|mask|z,zmmreg*,zmmrm512 AVX512,GFNI
B.1.49 AVX512 Vector Bit Manipulation Instructions 2
VPCOMPRESSB mem128|mask,xmmreg AVX512VBMI2/VL
VPCOMPRESSB mem256|mask,ymmreg AVX512VBMI2/VL
VPCOMPRESSB mem512|mask,zmmreg AVX512VBMI2
VPCOMPRESSB xmmreg|mask|z,xmmreg AVX512VBMI2/VL
VPCOMPRESSB ymmreg|mask|z,ymmreg AVX512VBMI2/VL
VPCOMPRESSB zmmreg|mask|z,zmmreg AVX512VBMI2
VPCOMPRESSW mem128|mask,xmmreg AVX512VBMI2/VL
VPCOMPRESSW mem256|mask,ymmreg AVX512VBMI2/VL
VPCOMPRESSW mem512|mask,zmmreg AVX512VBMI2
VPCOMPRESSW xmmreg|mask|z,xmmreg AVX512VBMI2/VL
VPCOMPRESSW ymmreg|mask|z,ymmreg AVX512VBMI2/VL
VPCOMPRESSW zmmreg|mask|z,zmmreg AVX512VBMI2
VPEXPANDB mem128|mask,xmmreg AVX512VBMI2/VL
VPEXPANDB mem256|mask,ymmreg AVX512VBMI2/VL
VPEXPANDB mem512|mask,zmmreg AVX512VBMI2
VPEXPANDB xmmreg|mask|z,xmmreg AVX512VBMI2/VL
VPEXPANDB ymmreg|mask|z,ymmreg AVX512VBMI2/VL
VPEXPANDB zmmreg|mask|z,zmmreg AVX512VBMI2
VPEXPANDW mem128|mask,xmmreg AVX512VBMI2/VL
VPEXPANDW mem256|mask,ymmreg AVX512VBMI2/VL
VPEXPANDW mem512|mask,zmmreg AVX512VBMI2
VPEXPANDW xmmreg|mask|z,xmmreg AVX512VBMI2/VL
VPEXPANDW ymmreg|mask|z,ymmreg AVX512VBMI2/VL
VPEXPANDW zmmreg|mask|z,zmmreg AVX512VBMI2
VPSHLDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VBMI2/VL
VPSHLDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VBMI2/VL
VPSHLDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512VBMI2
VPSHLDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VBMI2/VL
VPSHLDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VBMI2/VL
VPSHLDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512VBMI2
VPSHLDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VBMI2/VL
VPSHLDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VBMI2/VL
VPSHLDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512VBMI2
VPSHLDVW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VBMI2/VL
VPSHLDVW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VBMI2/VL
VPSHLDVW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI2
VPSHLDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VBMI2/VL
VPSHLDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VBMI2/VL
VPSHLDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VBMI2
VPSHLDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VBMI2/VL
VPSHLDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VBMI2/VL
VPSHLDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI2
VPSHRDW xmmreg|mask|z,xmmreg*,xmmrm128,imm8 AVX512VBMI2/VL
VPSHRDW ymmreg|mask|z,ymmreg*,ymmrm256,imm8 AVX512VBMI2/VL
VPSHRDW zmmreg|mask|z,zmmreg*,zmmrm512,imm8 AVX512VBMI2
VPSHRDD xmmreg|mask|z,xmmreg*,xmmrm128|b32,imm8 AVX512VBMI2/VL
VPSHRDD ymmreg|mask|z,ymmreg*,ymmrm256|b32,imm8 AVX512VBMI2/VL
VPSHRDD zmmreg|mask|z,zmmreg*,zmmrm512|b32,imm8 AVX512VBMI2
VPSHRDQ xmmreg|mask|z,xmmreg*,xmmrm128|b64,imm8 AVX512VBMI2/VL
VPSHRDQ ymmreg|mask|z,ymmreg*,ymmrm256|b64,imm8 AVX512VBMI2/VL
VPSHRDQ zmmreg|mask|z,zmmreg*,zmmrm512|b64,imm8 AVX512VBMI2
VPSHRDVW xmmreg|mask|z,xmmreg*,xmmrm128 AVX512VBMI2/VL
VPSHRDVW ymmreg|mask|z,ymmreg*,ymmrm256 AVX512VBMI2/VL
VPSHRDVW zmmreg|mask|z,zmmreg*,zmmrm512 AVX512VBMI2
VPSHRDVD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VBMI2/VL
VPSHRDVD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VBMI2/VL
VPSHRDVD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VBMI2
VPSHRDVQ xmmreg|mask|z,xmmreg*,xmmrm128|b64 AVX512VBMI2/VL
VPSHRDVQ ymmreg|mask|z,ymmreg*,ymmrm256|b64 AVX512VBMI2/VL
VPSHRDVQ zmmreg|mask|z,zmmreg*,zmmrm512|b64 AVX512VBMI2
B.1.50 AVX512 VNNI
VPDPBUSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL
VPDPBUSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL
VPDPBUSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI
VPDPBUSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL
VPDPBUSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL
VPDPBUSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI
VPDPWSSD xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL
VPDPWSSD ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL
VPDPWSSD zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI
VPDPWSSDS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512VNNI/VL
VPDPWSSDS ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512VNNI/VL
VPDPWSSDS zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512VNNI
B.1.51 AVX512 Bit Algorithms
VPOPCNTB xmmreg|mask|z,xmmrm128 AVX512BITALG/VL
VPOPCNTB ymmreg|mask|z,ymmrm256 AVX512BITALG/VL
VPOPCNTB zmmreg|mask|z,zmmrm512 AVX512BITALG
VPOPCNTW xmmreg|mask|z,xmmrm128 AVX512BITALG/VL
VPOPCNTW ymmreg|mask|z,ymmrm256 AVX512BITALG/VL
VPOPCNTW zmmreg|mask|z,zmmrm512 AVX512BITALG
VPOPCNTD xmmreg|mask|z,xmmrm128 AVX512VPOPCNTDQ/VL
VPOPCNTD ymmreg|mask|z,ymmrm256 AVX512VPOPCNTDQ/VL
VPOPCNTD zmmreg|mask|z,zmmrm512 AVX512VPOPCNTDQ
VPOPCNTQ xmmreg|mask|z,xmmrm128 AVX512VPOPCNTDQ/VL
VPOPCNTQ ymmreg|mask|z,ymmrm256 AVX512VPOPCNTDQ/VL
VPOPCNTQ zmmreg|mask|z,zmmrm512 AVX512VPOPCNTDQ
VPSHUFBITQMB kreg|mask,xmmreg,xmmrm128 AVX512BITALG/VL
VPSHUFBITQMB kreg|mask,ymmreg,ymmrm256 AVX512BITALG/VL
VPSHUFBITQMB kreg|mask,zmmreg,zmmrm512 AVX512BITALG
B.1.52 AVX512 4-iteration Multiply-Add
V4FMADDPS zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO
V4FNMADDPS zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO
V4FMADDSS zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO
V4FNMADDSS zmmreg|mask|z,zmmreg|rs4,mem AVX5124FMAPS,SO
B.1.53 AVX512 4-iteration Dot Product
V4DPWSSDS zmmreg|mask|z,zmmreg|rs4,mem AVX5124VNNIW,SO
V4DPWSSD zmmreg|mask|z,zmmreg|rs4,mem AVX5124VNNIW,SO
B.1.54 Intel Software Guard Extensions (SGX)
ENCLS SGX
ENCLU SGX
ENCLV SGX
B.1.55 Intel Control-Flow Enforcement Technology (CET)
CLRSSBSY mem64 CET
ENDBR32 CET
ENDBR64 CET
INCSSPD reg32 CET
INCSSPQ reg64 CET,LONG
RDSSPD reg32 CET
RDSSPQ reg64 CET,LONG
RSTORSSP mem64 CET
SAVEPREVSSP CET
SETSSBSY CET
WRUSSD mem32,reg32 CET
WRUSSQ mem64,reg64 CET,LONG
WRSSD mem32,reg32 CET
WRSSQ mem64,reg64 CET,LONG
B.1.56 Instructions from ISE doc 319433-040, June 2020
ENQCMD reg16,mem512 ENQCMD
ENQCMD reg32,mem512 ENQCMD,ND
ENQCMD reg32,mem512 ENQCMD
ENQCMD reg64,mem512 ENQCMD,LONG
ENQCMDS reg16,mem512 ENQCMD,PRIV
ENQCMDS reg32,mem512 ENQCMD,PRIV,ND
ENQCMDS reg32,mem512 ENQCMD,PRIV
ENQCMDS reg64,mem512 ENQCMD,PRIV,LONG
PCONFIG PCONFIG,PRIV
SERIALIZE SERIALIZE
WBNOINVD WBNOINVD,PRIV
XRESLDTRK TSXLDTRK
XSUSLDTRK TSXLDTRK
B.1.57 AVX512 Bfloat16 instructions
VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16
VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512BF16
VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BF16
VCVTNE2PS2BF16 xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16
VCVTNE2PS2BF16 ymmreg|mask|z,ymmreg*,ymmrm256|b32 AVX512BF16
VCVTNE2PS2BF16 zmmreg|mask|z,zmmreg*,zmmrm512|b32 AVX512BF16
VDPBF16PS xmmreg|mask|z,xmmreg*,xmmrm128|b32 AVX512BF16
VDPBF16PS ymmreg|mask|z,ymmreg*,ymmrm128|b32 AVX512BF16
VDPBF16PS zmmreg|mask|z,zmmreg*,zmmrm128|b32 AVX512BF16
B.1.58 AVX512 mask intersect instructions
VP2INTERSECTD kreg|rs2,xmmreg,xmmrm128|b32 AVX512BF16 VP2INTERSECTD kreg|rs2,ymmreg,ymmrm128|b32 AVX512BF16
VP2INTERSECTD kreg|rs2,zmmreg,zmmrm128|b32 AVX512BF16
B.1.59 Intel Advanced Matrix Extensions (AMX)
LDTILECFG mem512 AMXTILE,SZ,LONG
STTILECFG mem512 AMXTILE,SZ,LONG
TDPBF16PS tmmreg,tmmreg,tmmreg AMXBF16,LONG
TDPBSSD tmmreg,tmmreg,tmmreg AMXINT8,LONG
TDPBSUD tmmreg,tmmreg,tmmreg AMXINT8,LONG
TDPBUSD tmmreg,tmmreg,tmmreg AMXINT8,LONG
TDPBUUD tmmreg,tmmreg,tmmreg AMXINT8,LONG
TILELOADD tmmreg,mem AMXTILE,MIB,SIB,SX,LONG
TILELOADDT1 tmmreg,mem AMXTILE,MIB,SIB,SX,LONG
TILERELEASE AMXTILE,LONG
TILESTORED mem,tmmreg AMXTILE,MIB,SIB,SX,LONG
TILEZERO tmmreg AMXTILE,LONG
B.1.60 Systematic names for the hinting nop instructions
HINT_NOP0 rm16 P6,UNDOC
HINT_NOP0 rm32 P6,UNDOC
HINT_NOP0 rm64 X86_64,LONG,UNDOC
HINT_NOP1 rm16 P6,UNDOC
HINT_NOP1 rm32 P6,UNDOC
HINT_NOP1 rm64 X86_64,LONG,UNDOC
HINT_NOP2 rm16 P6,UNDOC
HINT_NOP2 rm32 P6,UNDOC
HINT_NOP2 rm64 X86_64,LONG,UNDOC
HINT_NOP3 rm16 P6,UNDOC
HINT_NOP3 rm32 P6,UNDOC
HINT_NOP3 rm64 X86_64,LONG,UNDOC
HINT_NOP4 rm16 P6,UNDOC
HINT_NOP4 rm32 P6,UNDOC
HINT_NOP4 rm64 X86_64,LONG,UNDOC
HINT_NOP5 rm16 P6,UNDOC
HINT_NOP5 rm32 P6,UNDOC
HINT_NOP5 rm64 X86_64,LONG,UNDOC
HINT_NOP6 rm16 P6,UNDOC
HINT_NOP6 rm32 P6,UNDOC
HINT_NOP6 rm64 X86_64,LONG,UNDOC
HINT_NOP7 rm16 P6,UNDOC
HINT_NOP7 rm32 P6,UNDOC
HINT_NOP7 rm64 X86_64,LONG,UNDOC
HINT_NOP8 rm16 P6,UNDOC
HINT_NOP8 rm32 P6,UNDOC
HINT_NOP8 rm64 X86_64,LONG,UNDOC
HINT_NOP9 rm16 P6,UNDOC
HINT_NOP9 rm32 P6,UNDOC
HINT_NOP9 rm64 X86_64,LONG,UNDOC
HINT_NOP10 rm16 P6,UNDOC
HINT_NOP10 rm32 P6,UNDOC
HINT_NOP10 rm64 X86_64,LONG,UNDOC
HINT_NOP11 rm16 P6,UNDOC
HINT_NOP11 rm32 P6,UNDOC
HINT_NOP11 rm64 X86_64,LONG,UNDOC
HINT_NOP12 rm16 P6,UNDOC
HINT_NOP12 rm32 P6,UNDOC
HINT_NOP12 rm64 X86_64,LONG,UNDOC
HINT_NOP13 rm16 P6,UNDOC
HINT_NOP13 rm32 P6,UNDOC
HINT_NOP13 rm64 X86_64,LONG,UNDOC
HINT_NOP14 rm16 P6,UNDOC
HINT_NOP14 rm32 P6,UNDOC
HINT_NOP14 rm64 X86_64,LONG,UNDOC
HINT_NOP15 rm16 P6,UNDOC
HINT_NOP15 rm32 P6,UNDOC
HINT_NOP15 rm64 X86_64,LONG,UNDOC
HINT_NOP16 rm16 P6,UNDOC
HINT_NOP16 rm32 P6,UNDOC
HINT_NOP16 rm64 X86_64,LONG,UNDOC
HINT_NOP17 rm16 P6,UNDOC
HINT_NOP17 rm32 P6,UNDOC
HINT_NOP17 rm64 X86_64,LONG,UNDOC
HINT_NOP18 rm16 P6,UNDOC
HINT_NOP18 rm32 P6,UNDOC
HINT_NOP18 rm64 X86_64,LONG,UNDOC
HINT_NOP19 rm16 P6,UNDOC
HINT_NOP19 rm32 P6,UNDOC
HINT_NOP19 rm64 X86_64,LONG,UNDOC
HINT_NOP20 rm16 P6,UNDOC
HINT_NOP20 rm32 P6,UNDOC
HINT_NOP20 rm64 X86_64,LONG,UNDOC
HINT_NOP21 rm16 P6,UNDOC
HINT_NOP21 rm32 P6,UNDOC
HINT_NOP21 rm64 X86_64,LONG,UNDOC
HINT_NOP22 rm16 P6,UNDOC
HINT_NOP22 rm32 P6,UNDOC
HINT_NOP22 rm64 X86_64,LONG,UNDOC
HINT_NOP23 rm16 P6,UNDOC
HINT_NOP23 rm32 P6,UNDOC
HINT_NOP23 rm64 X86_64,LONG,UNDOC
HINT_NOP24 rm16 P6,UNDOC
HINT_NOP24 rm32 P6,UNDOC
HINT_NOP24 rm64 X86_64,LONG,UNDOC
HINT_NOP25 rm16 P6,UNDOC
HINT_NOP25 rm32 P6,UNDOC
HINT_NOP25 rm64 X86_64,LONG,UNDOC
HINT_NOP26 rm16 P6,UNDOC
HINT_NOP26 rm32 P6,UNDOC
HINT_NOP26 rm64 X86_64,LONG,UNDOC
HINT_NOP27 rm16 P6,UNDOC
HINT_NOP27 rm32 P6,UNDOC
HINT_NOP27 rm64 X86_64,LONG,UNDOC
HINT_NOP28 rm16 P6,UNDOC
HINT_NOP28 rm32 P6,UNDOC
HINT_NOP28 rm64 X86_64,LONG,UNDOC
HINT_NOP29 rm16 P6,UNDOC
HINT_NOP29 rm32 P6,UNDOC
HINT_NOP29 rm64 X86_64,LONG,UNDOC
HINT_NOP30 rm16 P6,UNDOC
HINT_NOP30 rm32 P6,UNDOC
HINT_NOP30 rm64 X86_64,LONG,UNDOC
HINT_NOP31 rm16 P6,UNDOC
HINT_NOP31 rm32 P6,UNDOC
HINT_NOP31 rm64 X86_64,LONG,UNDOC
HINT_NOP32 rm16 P6,UNDOC
HINT_NOP32 rm32 P6,UNDOC
HINT_NOP32 rm64 X86_64,LONG,UNDOC
HINT_NOP33 rm16 P6,UNDOC
HINT_NOP33 rm32 P6,UNDOC
HINT_NOP33 rm64 X86_64,LONG,UNDOC
HINT_NOP34 rm16 P6,UNDOC
HINT_NOP34 rm32 P6,UNDOC
HINT_NOP34 rm64 X86_64,LONG,UNDOC
HINT_NOP35 rm16 P6,UNDOC
HINT_NOP35 rm32 P6,UNDOC
HINT_NOP35 rm64 X86_64,LONG,UNDOC
HINT_NOP36 rm16 P6,UNDOC
HINT_NOP36 rm32 P6,UNDOC
HINT_NOP36 rm64 X86_64,LONG,UNDOC
HINT_NOP37 rm16 P6,UNDOC
HINT_NOP37 rm32 P6,UNDOC
HINT_NOP37 rm64 X86_64,LONG,UNDOC
HINT_NOP38 rm16 P6,UNDOC
HINT_NOP38 rm32 P6,UNDOC
HINT_NOP38 rm64 X86_64,LONG,UNDOC
HINT_NOP39 rm16 P6,UNDOC
HINT_NOP39 rm32 P6,UNDOC
HINT_NOP39 rm64 X86_64,LONG,UNDOC
HINT_NOP40 rm16 P6,UNDOC
HINT_NOP40 rm32 P6,UNDOC
HINT_NOP40 rm64 X86_64,LONG,UNDOC
HINT_NOP41 rm16 P6,UNDOC
HINT_NOP41 rm32 P6,UNDOC
HINT_NOP41 rm64 X86_64,LONG,UNDOC
HINT_NOP42 rm16 P6,UNDOC
HINT_NOP42 rm32 P6,UNDOC
HINT_NOP42 rm64 X86_64,LONG,UNDOC
HINT_NOP43 rm16 P6,UNDOC
HINT_NOP43 rm32 P6,UNDOC
HINT_NOP43 rm64 X86_64,LONG,UNDOC
HINT_NOP44 rm16 P6,UNDOC
HINT_NOP44 rm32 P6,UNDOC
HINT_NOP44 rm64 X86_64,LONG,UNDOC
HINT_NOP45 rm16 P6,UNDOC
HINT_NOP45 rm32 P6,UNDOC
HINT_NOP45 rm64 X86_64,LONG,UNDOC
HINT_NOP46 rm16 P6,UNDOC
HINT_NOP46 rm32 P6,UNDOC
HINT_NOP46 rm64 X86_64,LONG,UNDOC
HINT_NOP47 rm16 P6,UNDOC
HINT_NOP47 rm32 P6,UNDOC
HINT_NOP47 rm64 X86_64,LONG,UNDOC
HINT_NOP48 rm16 P6,UNDOC
HINT_NOP48 rm32 P6,UNDOC
HINT_NOP48 rm64 X86_64,LONG,UNDOC
HINT_NOP49 rm16 P6,UNDOC
HINT_NOP49 rm32 P6,UNDOC
HINT_NOP49 rm64 X86_64,LONG,UNDOC
HINT_NOP50 rm16 P6,UNDOC
HINT_NOP50 rm32 P6,UNDOC
HINT_NOP50 rm64 X86_64,LONG,UNDOC
HINT_NOP51 rm16 P6,UNDOC
HINT_NOP51 rm32 P6,UNDOC
HINT_NOP51 rm64 X86_64,LONG,UNDOC
HINT_NOP52 rm16 P6,UNDOC
HINT_NOP52 rm32 P6,UNDOC
HINT_NOP52 rm64 X86_64,LONG,UNDOC
HINT_NOP53 rm16 P6,UNDOC
HINT_NOP53 rm32 P6,UNDOC
HINT_NOP53 rm64 X86_64,LONG,UNDOC
HINT_NOP54 rm16 P6,UNDOC
HINT_NOP54 rm32 P6,UNDOC
HINT_NOP54 rm64 X86_64,LONG,UNDOC
HINT_NOP55 rm16 P6,UNDOC
HINT_NOP55 rm32 P6,UNDOC
HINT_NOP55 rm64 X86_64,LONG,UNDOC
HINT_NOP56 rm16 P6,UNDOC
HINT_NOP56 rm32 P6,UNDOC
HINT_NOP56 rm64 X86_64,LONG,UNDOC
HINT_NOP57 rm16 P6,UNDOC
HINT_NOP57 rm32 P6,UNDOC
HINT_NOP57 rm64 X86_64,LONG,UNDOC
HINT_NOP58 rm16 P6,UNDOC
HINT_NOP58 rm32 P6,UNDOC
HINT_NOP58 rm64 X86_64,LONG,UNDOC
HINT_NOP59 rm16 P6,UNDOC
HINT_NOP59 rm32 P6,UNDOC
HINT_NOP59 rm64 X86_64,LONG,UNDOC
HINT_NOP60 rm16 P6,UNDOC
HINT_NOP60 rm32 P6,UNDOC
HINT_NOP60 rm64 X86_64,LONG,UNDOC
HINT_NOP61 rm16 P6,UNDOC
HINT_NOP61 rm32 P6,UNDOC
HINT_NOP61 rm64 X86_64,LONG,UNDOC
HINT_NOP62 rm16 P6,UNDOC
HINT_NOP62 rm32 P6,UNDOC
HINT_NOP62 rm64 X86_64,LONG,UNDOC
HINT_NOP63 rm16 P6,UNDOC
HINT_NOP63 rm32 P6,UNDOC
HINT_NOP63 rm64 X86_64,LONG,UNDOC
标签：第二,mask,指令,kreg,ymmreg,AVX512VL,zmmreg,xmmreg,NASM 来源： https://blog.csdn.net/qq_17790209/article/details/113790754