Makefile应用之Complicated工程

参考《专业嵌入式软件开发》中Makefile的complicated工程代码。

工程目录结构如下：

.
├── define.h
├── foo.c
├── foo.h
├── main.c
└── Makefile

1.Makefile

MKDIR := mkdir
RM := rm
RMFLAGS := -fr
CC := gcc


DIR_OBJS = objs
DIR_TARGET = exes
DIR_DEPS = deps
TARGET = complicated

DIRS = $(DIR_OBJS) $(DIR_TARGET) $(DIR_DEPS)
SRCS = $(wildcard *.c)

TARGET := $(addprefix $(DIR_TARGET)/,$(TARGET))

#OBJS = $(SRCS:.c=.o)
OBJS = $(patsubst %.c,%.o,$(SRCS))
OBJS := $(addprefix $(DIR_OBJS)/,$(OBJS))

DEPS = $(patsubst %.c,%.dep,$(SRCS))
DEPS := $(addprefix $(DIR_DEPS)/,$(DEPS))

all:$(TARGET)

# 把依赖文件包含进来
ifneq ($(MAKECMDGOALS),clean)
-include $(DEPS)
endif


$(TARGET):$(OBJS)
    @echo "DEPS is $(DEPS)"
    @echo "making $@"
    $(MKDIR) -p $(DIR_TARGET)
    $(CC) -o $@ $(filter %.o,$^)

$(DIR_DEPS)/%.dep:%.c  
    @echo "Making $@"    
    $(MKDIR) -p $(DIR_DEPS)
    $(CC) -MM -MT '$(addprefix $(DIR_OBJS)/,$(patsubst %.c,%.o,$<)) $@' -MF $@ $<


$(DIR_OBJS)/%.o: %.c
    @echo "making $@"
    $(MKDIR) -p $(DIR_OBJS)
    $(CC) -c -o $@ $<


clean:
    $(RM) $(RMFLAGS)  $(DIRS) 
.PHONY: all clean

2.main.c

#include <stdio.h>
void foo();
int main()
{
    printf("This is main()!\r\n");

    foo();

    return 0;
    
}

3.foo.c

#include <stdio.h>
#include "foo.h"

void foo()
{
    printf("This is foo()!MYFOO is %d\r\n",MYFOO);

}

4.foo.h

#ifndef __FOO_H
#define __FOO_H
#include "define.h"
//#define   MYFOO          160
void foo();

#endif

5.define.h

#ifndef __DEFINE_H
#define __DEFINE_H


#define MYFOO    120

#endif

标签：OBJS,%.,TARGET,工程,Makefile,Complicated,DEPS,foo,DIR
来源： https://www.cnblogs.com/yangjiguang/p/11628683.html