从计数器到可控线性序列机

1. 设计定义

　　2. 设计输入

1. //亮0.25s，灭0.75s
   
   module counter_led_1(
       clk,
       rst,
       led
       );
       
       input clk;
       input rst;
       output reg led;
       
       reg [25:0] cnt;
       parameter mcnt = 50_000_000;
       
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt <= 0;
           else if(cnt == mcnt-1)
               cnt <= 0;
           else
               cnt <= cnt + 1'b1;
               
        always@(posedge clk or negedge rst)
           if(!rst)
               led <= 0;
           else if(cnt == mcnt*3/4-1)
               led <= 1;
           else if(cnt == mcnt-1)
               led <= 0;
   endmodule

    

2. //亮0.25s，灭0.5s,亮0.75s，灭1s
   
   module counter_led_2(
       clk,
       rst,
       led
       );
       
       input clk;
       input rst;
       output reg led;
       
       reg [26:0] cnt;
       parameter mcnt = 125_000_000; //循环周期为2.5s
       
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt <= 0;
           else if(cnt == mcnt-1)
               cnt <= 0;
           else
               cnt <= cnt + 1'b1;
               
        always@(posedge clk or negedge rst)
           if(!rst)
               led <= 1;
           else if(cnt == mcnt/10-1)   //亮0.25s
               led <= 0;
           else if(cnt == (mcnt/10+mcnt/5)-1)  //灭0.5s
               led <= 1;
           else if(cnt == (mcnt/10+mcnt/5+0.3*mcnt)-1) //亮0.75s
               led <= 0;
           else if(cnt == mcnt-1) //灭1s
               led <= 1;
   endmodule

   3.

   //让LED灯按照指定的亮灭模式亮灭，亮灭模式未知，由用户随机指定。以0.25s为一个变化周期，8个变化状态为一个循环
   
   module counter_led_3(
       clk,
       rst,
       ctr1,
       led
       );
       
       input clk;
       input rst;
       input [7:0] ctr1;
       output reg led;
       
       reg [26:0] cnt;
       parameter mcnt = 100_000_000; //循环周期为2s
       
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt <= 0;
           else if(cnt == mcnt-1)
               cnt <= 0;
           else
               cnt <= cnt + 1'b1;
               
        always@(posedge clk or negedge rst)
           if(!rst)
               led <= 0;
           else if(cnt == mcnt/8-1)   //
               led <= ctr1[0];
           else if(cnt == mcnt*2/8-1)  //
               led <= ctr1[1];
           else if(cnt == mcnt*3/8-1)  //
               led <= ctr1[2];
           else if(cnt == mcnt*4/8-1)  //
               led <= ctr1[3];
           else if(cnt == mcnt*5/8-1)  //
               led <= ctr1[4]; 
           else if(cnt == mcnt*6/8-1)  //
               led <= ctr1[5];                       
           else if(cnt == mcnt*7/8-1)  //
               led <= ctr1[6];  
           else if(cnt == mcnt*8/8-1)  //
               led <= ctr1[7];      
               
   //     always@(posedge clk or negedge rst)
   //        if(!rst)
   //            led <= 0;
   //        else case(cnt) 
   //            mcnt*1/8-1: led <= ctr1[0];
   //            mcnt*2/8-1: led <= ctr1[1];
   //            mcnt*3/8-1: led <= ctr1[2];
   //            mcnt*4/8-1: led <= ctr1[3];
   //            mcnt*5/8-1: led <= ctr1[4];
   //            mcnt*6/8-1: led <= ctr1[5];
   //            mcnt*7/8-1: led <= ctr1[6];
   //            mcnt*8/8-1: led <= ctr1[7];
   //            default:led <= led;
   //        endcase              
   endmodule

   4.

   //让LED灯按照指定的亮灭模式亮灭，亮灭模式未知，由用户随机指定。8个变化状态为1个循环，每个变换状态的时间值可以根据不同的应用场景选择
   
   module counter_led_4(
       clk,
       rst,
       ctr1,
       Time,
       led
       );
       
       input clk;
       input rst;
       input [7:0] ctr1;
       input [31:0]Time;
       output reg led;
       
       reg [31:0] cnt;
       reg [2:0] cnt2;
    
       
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt <= 0;
           else if(cnt == Time-1)
               cnt <= 0;
           else
               cnt <= cnt + 1'b1;
               
        always@(posedge clk or negedge rst)
           if(!rst)
               cnt2 <= 0;
           else if(cnt == Time-1)   //
               cnt2 <= cnt2 + 1'b1;
                     
        always@(posedge clk or negedge rst)
           if(!rst)
               led <= 0;
           else case(cnt2) 
               0: led <= ctr1[0];
               1: led <= ctr1[1];
               2: led <= ctr1[2];
               3: led <= ctr1[3];
               4: led <= ctr1[4];
               5: led <= ctr1[5];
               6: led <= ctr1[6];
               7: led <= ctr1[7];
               default:led <= led;
           endcase              
   endmodule

   5.

   //让多个LED灯按照设置的模式各自在一个变化循环内独立亮灭变化
   
   module counter_led_5(
       clk,
       rst,
       ctr1,
       ctr2,
       Time,
       led
       );
       
       input clk;
       input rst;
       input [7:0] ctr1;
       input [7:0] ctr2;
       input [31:0]Time;
       output reg[1:0] led;
       
       reg [31:0] cnt;
       reg [2:0] cnt2;
    
       
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt <= 0;
           else if(cnt == Time-1)
               cnt <= 0;
           else
               cnt <= cnt + 1'b1;
               
        always@(posedge clk or negedge rst)
           if(!rst)
               cnt2 <= 0;
           else if(cnt == Time-1)   //
               cnt2 <= cnt2 + 1'b1;
                     
        always@(posedge clk or negedge rst)
           if(!rst)
               led <= 0;
           else case(cnt2) 
               0: begin led[0] <= ctr1[0];led[1] <= ctr2[0]; end
               1: begin led[0] <= ctr1[1];led[1] <= ctr2[1]; end
               2: begin led[0] <= ctr1[2];led[1] <= ctr2[2]; end
               3: begin led[0] <= ctr1[3];led[1] <= ctr2[3]; end
               4: begin led[0] <= ctr1[4];led[1] <= ctr2[4]; end
               5: begin led[0] <= ctr1[5];led[1] <= ctr2[5]; end
               6: begin led[0] <= ctr1[6];led[1] <= ctr2[6]; end
               7: begin led[0] <= ctr1[7];led[1] <= ctr2[7]; end
               default:led <= led;
           endcase              
   endmodule

   6.

   //每隔4ms，让LED灯的一个8状态循环执行一次（8状态完整执行一次设置为2ms）
   
   module counter_led_6(
       clk,
       rst,
       ctr1,
       Time,
       led
       );
       
       input clk;
       input rst;
       input [7:0] ctr1;
       input [31:0]Time;
       output reg led;
       
       reg [31:0] cnt;
       reg [2:0] cnt2;
       reg [31:0] cnt3;
       reg enable;
    
       
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt <= 0;
           else if(cnt == Time-1)
               cnt <= 0;
           else
               cnt <= cnt + 1'b1;
               
        always@(posedge clk or negedge rst)
           if(!rst)
               cnt2 <= 0;
           else if(cnt == Time-1)   //
               cnt2 <= cnt2 + 1'b1;
               
       always@(posedge clk or negedge rst)
           if(!rst)
               cnt3 <= 0;
           else if(cnt3 == 200_000-1)
               cnt3 <= 0;
           else
               cnt3 <= cnt3 + 1'b1;
               
       always@(posedge clk or negedge rst)
           if(!rst)
               enable <= 1;
           else if(cnt3 == 100_000-1)
               enable <= 0;
           else if(cnt3 == 200_000-1)
               enable <= 1;
           else
               enable <= enable;
                     
        always@(posedge clk or negedge rst)
           if(!rst)
               led <= 0;
           else if(enable==1) begin
            case({cnt2}) 
               0: led <= ctr1[0];
               1: led <= ctr1[1];
               2: led <= ctr1[2];
               3: led <= ctr1[3];
               4: led <= ctr1[4];
               5: led <= ctr1[5];
               6: led <= ctr1[6];
               7: led <= ctr1[7];
               default:led <= led;
            endcase  
            end  
          else if(enable ==0)
               led <= 0;          
   endmodule

    

标签：cnt,led,clk,可控,rst,计数器,线性,input,reg
来源： https://www.cnblogs.com/daxiongjingxiang/p/16474362.html