ARM watchpoint/breakpoint registers
作者：互联网
write_wb_reg()里的switch macro展开
4.19\arch\arm64\kernel\Hw_breakpoint.c
static void write_wb_reg(int reg, int n, u64 val)
{
switch (reg + n) {
GEN_WRITE_WB_REG_CASES(AARCH64_DBG_REG_BVR, AARCH64_DBG_REG_NAME_BVR, val);
GEN_WRITE_WB_REG_CASES(AARCH64_DBG_REG_BCR, AARCH64_DBG_REG_NAME_BCR, val);
GEN_WRITE_WB_REG_CASES(AARCH64_DBG_REG_WVR, AARCH64_DBG_REG_NAME_WVR, val);
GEN_WRITE_WB_REG_CASES(AARCH64_DBG_REG_WCR, AARCH64_DBG_REG_NAME_WCR, val);
default:
pr_warning("attempt to write to unknown breakpoint register %d\n", n);
}
isb();
}
above switch expanding as below:
switch (reg + n) {
/* wvr(breakpoint value register) */
case (0): \
do {\
write_sysreg(val, dbgbvr0_el1);\
} while (0); \
break;
case (1): \
do {\
write_sysreg(val, dbgbvr1_el1);\
} while (0); \
break;
case (15): \
do {\
write_sysreg(val, dbgbvr15_el1);\
} while (0); \
break;
/* wvr(breakpoint ctrl register) */
case (16 + 0): \
do {\
write_sysreg(VAL, dbgbcr0_el1);\
} while (0); \
break
case (16 + 1): \
do {\
write_sysreg(VAL, dbgbcr1_el1);\
} while (0); \
break
case (16 + 15): \
do {\
write_sysreg(VAL, dbgbcr15_el1);\
} while (0); \
break
/* wvr(watchpoint value register) */
case (32 + 0): \
do {\
write_sysreg(VAL, dbgwvr0_el1);\
} while (0); \
break
case (32 + 1): \
do {\
write_sysreg(VAL, dbgwvr1_el1);\
} while (0); \
break
case (32 + 15): \
do {\
write_sysreg(VAL, dbgwvr15_el1);\
} while (0); \
break
/* wvr(watchpoint ctrl register) */
case (48 + 0): \
do {\
write_sysreg(VAL, dbgwcr0_el1);\
} while (0); \
break
case (48 + 1): \
do {\
write_sysreg(VAL, dbgwcr1_el1);\
} while (0); \
break
case (48 + 15): \
do {\
write_sysreg(VAL, dbgwcr15_el1);\
} while (0); \
break
}
bvr/bcr/wvr/wcr寄存器分别为breakpoint value register/breakpoint ctrl register/watchpoint value register/watchpoint ctrl register
这些寄存器描述见下面链接：
https://developer.arm.com/documentation/ddi0500/e/debug/memory-mapped-register-summary
标签：do,watchpoint,sysreg,REG,write,registers,break,el1,ARM 来源： https://www.cnblogs.com/aspirs/p/15459409.html