20220513_ISA

Three Main types of instruction

Operation instructions

LC-3: ADD R0, R1, R2

Top 4 bits specify the operation

OP=op code

SR1,SR2=source code

DR=destination code

R-type in MIPS

3 reg instruction

rs,rt=source reg

rd=destination

shamt=shift amount(for shift op)

funct=operation in R-type instruction

Data movement instruction

a=A[i]

load a,A,i

LC-3:

LDR R3, R0, #2

MIPS:

lw $s3, 2($s0)

寻址方式：base+offset

For byte-addressable MIPS:

lw $s3, 8($s0)

$s3 = Memory[$s0+8]

Control flow

they can change the PC by loading it during the execution stage. And wipe out the incremented PC.

also we have jal and jr

jump and link
jump with register

Instruction Cycle

1. Detch
2. Decode
3. Evaluate
4. Fetch operands
5. Execute
6. Store result

Control of the Instruction Cycle

Instruction Set：defines opcode, data types, and addressing modes. ISA is the interface between software command and hardware carries out.

Tradeoffs are involved

Hardware complexity VS software complexity

标签：code,s3,instruction,20220513,Instruction,MIPS,ISA,s0
来源： https://www.cnblogs.com/EddieW/p/16268273.html